本文是提出一可程式規劃系統晶片(System On Program Chip, SOPC) 之系統架構,針對粒子濾波器演算法,利用FPGA(Field Programming Gate Array)的硬體電路優勢,以軟硬體協同設計(HW/SW co-design)之方式實現硬體加速之功能,提升之演算法執行效率。藉由軟硬體緊密的合作,可以加快執行速度,也由於有彈性的設計方式,使得在解決各種問題時不需要重新設計硬體。最後,本文將以該軟硬體協同設計方式實現之粒子濾波器,配合多主從系統架構設計一物體影像即時追蹤系統,以驗證系統之性能表現。
This paper presents a hardware/software (HW/SW) co-design approach using SOPC technique and pipeline design method to improve the execution performance of particle filter (PF) for embedded applications. Based on modular design architecture, a particle updating accelerator module via hardware implementation for updating particles and a weight evaluation module implemented on a soft-cored processor for calculating weighting for each particle are respectively designed and work closely together to accelerate the execution process. Thanks to a flexible design, the proposed approach can tackle various problems of embedded applications without the need for hardware redesign. Experiment results have demonstrated that the proposed HW/SW co-deign approach to realize particle filters has good computational efficiency to achieve a high-quality solution effectively. Finally, we realize the proposed particle filter with multi-master system architecture design to establish an image processing system for real-time object tracking