本文使用干擾估來提升伺服馬達旋轉位置的精度，其針對重覆運動所產生的週期性干擾進行估測，並補償至控制系統中達到訓練機械精準地完成動作。為了驗證控制器的功效性，本文使用伺服馬達裝載四連桿機構產生非線性的干擾，四連桿機構在運行時會通過死點，對系統帶來極大的干擾，不易即時地達到準確的估測。
本研究是在干擾估測器中加入反覆學習機制，來改善對於週期性干擾的估測能力，利用週期性干擾訊號每隔固定的時間就會重覆的特性，使得反覆學習機制可以漸進地逼近未知的訊號。相較傳統的方式，本研究的干擾觀測器針對於週期性干擾有更好的估測能力，當伺服馬達負載快速的變化時，干擾估測能力的提升可以提高位置控制的精準。
在實驗平台方面，使用三菱無刷伺服馬達，並使用美國德州儀器(Texas Instruments, TI)公司生產TMS320C6713 DSP開發板進行數位訊號處理，搭配具備FPGA、ADC、DAC等的擴充子板。在FPGA方面，利用VHDL硬體描述語言實現數位電路，進行訊號擷取；而在控制法則實現上，透過TI提供的Code Composer Studio (CCS)發展環境，以C/C++撰寫控制器程式並下載到DSP上執行，進行非線性平台的定速控制實驗。由實驗結果顯示，本研究提出之方法能有效地估測系中週期性干擾。

The disturbance observer (DOB) is useful to a control system. When a system is of high-order and subject to periodic disturbances, The DOB is unable to effectively attenuate such disturbances with a finite-bandwidth filter. Thus it becomes a tradeoff problem between noise rejection and disturbance attenuation. The conventional infinite-order disturbance observer (IFDOB) has been proposed to suppress a periodic disturbance. A modification to the IFDOB was also proposed to enhance the low-frequency compensation. Moreover, an integral disturbance observer (IDOB) and an DC-IDOB were presented to simplify DOB’s implementation. This thesis presents an IF-IDOB scheme that combined the advantages of the IDOB and the repetitive control in order to provide enhanced estimation of periodic disturbances.
The experimentation is carried out using TSM320C6713 DSP and a daughter board, including FPGA, DAC, and ADC. The digital circuit of FPGA is designed by the VHSIC very high-speed hardware description languages to implement data acquisition and storage. The code composer studio developed by Texas Instruments is an effective tool for compiling C/C++ for the control algorithm. The sampling rate of DSP is fixed to 11kHz and achieves a real-time control system.

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