適用於寬廣操作電壓下容忍製程變異處理器之可容錯正反器與標準元件庫設計

Error Resilient Flip-Flop and Standard Cell Library Design for Wide-operating-range Variation Tolerant Processors

黃哲銘(Che-Min Huang)

指導教授 ： 闕志達

國立臺灣大學/電機資訊學院/電子工程學研究所/碩士(2013年)

https://doi.org/10.6342/NTU.2013.10062

摘要

由於消費者的需求，目前手持式裝置的功能愈來愈強大，然而有限的電池容量無法因應耗電量過大的問題；根據裝置目前所需的效能需求，使用動態電壓頻率調整的技術可以有效降低能源消耗，但在愈來愈先進的製程中，因為電晶體面積及臨界電壓的下降，變異的發生將更嚴重影響電路效能，甚至使電路失效。
本論文設計了一個能操作在0.4v的元件庫，能夠確保在低電壓操作下邏輯的正確性。而為了因應低電壓下變異對電路造成的影響，本論文提出了時序錯誤復原正反器，能夠使變異對電路造成的影響被消除，進而提升電路的效能。模擬結果顯示所提出的方法在各個測試電路，包括Leon3處理器中都能得到更佳的能源的使用效率。

關鍵字

低電壓元件庫 ； 動態電壓頻率調整 ； 時序錯誤偵測及更正 ； 寬廣電壓操作處理器 ； 低功耗電路設計

並列摘要

Due to demands of consumers, handheld devices are more and more powerful. However, limited energy capacitance cannot afford this energy budget. According to the performance needed now, dynamic voltage frequency scaling (DVFS) can efficiently lowering the energy consumption. But in the advanced technology node, transistor size and threshold voltage are so small that variation can cause serious impact in circuits performance or functionality.
This thesis design a low-voltage cell library, and make sure the integrity of cells when operating at 0.4 volt. This thesis also proposes timing error resilient flip-flop to mitigate the impact of variation, so that the performance of circuits can be improved. The simulation results show that the proposed method can get better energy efficiency in benchmarks and Leon3 processor.

並列關鍵字

Low Voltage Cell Library ； Dynamic Voltage Frequency Scaling ； Timing Error Detection and Correction ； Wide-Operating-Range Processor ； Low Power Circuit Design

參考文獻

參考資料

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