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  • 學位論文

低頻低功率軌對軌差動運算放大器之雜訊改善積體電路設計

Noise Improvement of Low Frequency and Low Power Dissipation Rail-To-Rail Differential Inpup Operational Amplifier IC Design

指導教授 : 龔正 黃智方
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摘要


在本篇論文中,利用TSMC 矽鍺0.35微米製程技術來設計應用於低頻操作的放大器,並且利用H-SPICE軟體對其進行模擬分析,此電路稱之為「低頻低功率軌對軌差動運算放大器之雜訊改善積體電路設計」。雜訊改善的方式是使用BiCMOS做為輸入級差動對的電路結構,以取代CMOS輸入級差動對的電路結構,然後透過設計出使用這兩種不同輸入級的運算放大器,並對其進行模擬分析與比較而得到本論文之研究結果。最後將其接成儀器放大器的電路架構,並再次進行模擬分析與比較而證實所設計出的運算放大器應用於儀器放大器上 亦能有改善雜訊的效果。另外,本論文內有提及所設計的電路可應用於醫療電子方面的心電圖(ECG)儀器上,並對ECG認識進行簡單之介紹。

並列摘要


In this work, TSMC SiGe0.35μm technology is used to design a low noise analog integrated circuit. This work is called 「Noise Improvement of Low-frequency , Low-power Rail-To-Rail Differential Input Op-Amp」, and is simulated by H-SPICE. It uses BiCMOS technology replacing CMOS technology in the differential input stage to improve noise in Op-Amp circuits. Through simulation and comparison, the results show that noise in the BiCMOS rail-to-rail differential input Op-Amp is better than noise in CMOS rail-to-rail differential input Op-Amp. Finally, rail-to-rail instrumentation Amps are integrated by these two kinds of Op-Amp, and then they are simulated and compared again. The simulation and comparison results show that noise is significantly improved when using BiCMOS rail-to-rail differential input Op-Amps. In addition, this paper mentions the designed rail-to-rail instrumentation Amps could be applied as ECG Amplifier in the medical electronic. This paper also introduces what is ECG and ECG related electronics.

並列關鍵字

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參考文獻


[1]E. Allen and Douglas R. Holberg,“CMOS Analog Circuit Design”,Second Edition,OXFORD UNIVERSITY PRESS,2002.
[3]Johan H. Huijsing,“OPERATIONAL AMPLIFIERS Theory and Design”,KLUWER ACADEMIC PUBLISHERS,2001.
[7]W. Timothy Holman and J. Alvin Connelly,“A Compact Low Noise Operational Amplifier for a 1.2 pm Digital CMOS Technology”,IEEE Journal of Solid State Circuits,VOL.30,NO. 6,June 1995.
[8]JEAN-CLAUDE BERTAILS,“Low-Frequency Noise Considerations for MOS Amplifiers Design”,IEEE Journal of Solid State Circuits,VOL. SC-14,NO. 4,pp.773-776,Aug. 1979.
[9]Peter R.Kinget,“Device Mismatch and Tradeoffs in the Design of Analog Circuits”,IEEE Journal of Solid State Circuits,VOL. 40,NO. 6,June 2005.

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