- 學位論文
應用於高效節能之資料壓縮與混模應用導向晶片設計
Data Compression and Mixed Signal ASIC Design for Energy-efficient Low Power Applications
摘要
巨量的數據處理在無線感測網路上有許多方面的貢獻，如網路流量和能量約束，穿戴式裝置被廣泛應用於監測身體訊號成為長期保健和家庭照護的一種設備，當生理感測器檢測訊號後將資料傳輸至雲端數據庫做評估，並透過無線通訊系統達成監控之目的。由於穿戴式裝置講求低功率，本論文應用兩種不同的數據壓縮技術來降低無線感測網路和穿戴式裝置的功耗。 在數據採集方面，由於數據傳輸時感測器及接收器節點會消耗很多的功率，所以使用一種新壓縮感知技術降低所需採樣率，透過資料包酬載最大化以及傳輸活動最小化，使重建後的信號比原始訊號具有較低的功耗，進而減少無線感測網路的功耗。其中快速傅立葉轉換決定訊號的稀疏度，而擁有大係數及正交匹配追蹤演算法的測量矩陣則用來恢復原始訊號，最後使用Matlab軟體來模擬壓縮感知演算法的結果。 另一方面，為了實現智能類比數位轉換器(ADC)，在心電圖(ECG)監測信號中使用適應性解析度、混和訊號積體電路(ASIC)設計與無失真壓縮技術。其中類比數位轉換器的取樣時脈可由訊號特性可適應性地選擇，而無失真壓縮器由趨勢預測及熵編碼模組組成。透過自適解析及無失真壓縮技術讓晶片能有效降低傳輸資料率，並保持高質量的ECG信號檢測，以滿足低功耗之需求。此自適解析混和訊號積體電路(ASIC)採用0.18 µm CMOS製程實現，總功耗為78.8 µW，工作頻率為1 kHz，總晶片面積為850×850 µm2。
並列摘要
Huge data processing contributes many factors in wireless sensor network (WSN) such as network traffic and energy constraint. Wearable devices have become widely used to monitor body signals for long-term health care and home care applications. They detect vital signals through physiological sensors and then transmit them to a cloud database for evaluation and monitoring purposes through wireless communication systems. These wearable devices also need to pay attention their power consumption. This dissertation is divided into parts, applying two different data compression techniques for reducing the power consumption of WSN and wearable device. Using compressive sensing a new technique in data acquisition which reduced the required sampling rate to reconstruct the original signal will therefore lessen the power consumption of the WSN. The primary objective of the design is to reduce the power consumption on wireless system network by maximizing the data packet payloads while minimizing the transmission activity of the Wireless Sensor Network. The sensor and receiver node consume more power when transmission of data is taking place. Fast Fourier Transform (FFT) will determine the sparsity of the signal; the measurement matrix contains the large coefficients and orthogonal matching pursuit was used for the recovery of the original signals. Matlab was used to simulate the results of the compressive sensing algorithm. On the other hand, a smart analog-to-digital converter (ADC) was realized by a mixed-signal application-specific integrated circuit (ASIC) based on adaptive resolution and lossless compression techniques for electrocardiogram (ECG) signal monitoring. The sampling clock for the ADC can be adaptively selected according to the characteristic of the signals. The lossless encoder consists of trend forecasting and entropy coding modules. The transmission data rate was decreased efficiently by adaptive resolution and lossless compression techniques. The chip aims to meet the low power consumption for the design because it reduced the signal transmission rate and maintained high-quality ECG signal detection. The mixed-signal ASIC design was realized using a 0.18 μm CMOS process with a total power consumption of 78.8 µW when operating at 1 kHz and a total chip area of 850 × 850 μm2.
參考文獻
延伸閱讀
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