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  • 學位論文

微/奈米抗反射結構應用於矽晶太陽能電池之研製

Fabrication of silicon solar cell based on micro/nano antireflection structures

指導教授 : 楊啟榮
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摘要


目前商用太陽能電池,其抗反射結構大多以隨機金字塔結構,但此結構並無法達到最佳的電池效能。有鑑於傳統太陽能電池的製作方法,對於抗反射效能的提升極為有限,故本研究利用微影技術定義圖案,並搭配光輔助電化學蝕刻(PAECE)之整合技術,在矽晶片表面製作高深寬比的微/奈米抗反射結構。 微/奈米抗反射結構製作於N型矽基板上,當PAECE蝕刻時間為2 hr條件下,可得到具有倒金字塔的形貌外,尚還具有深凹的巨孔洞、微溝渠、黑色薄膜層等四種特殊結構。在390 nm900 nm波長範圍內,空白矽晶片的平均反射率為30.59 %。未經過PAECE蝕刻的倒金字塔陣列,平均反射效率為14.15 %;具倒金字塔陣列再經PAECE蝕刻後,平均反射率可降低為2.21 %。最後利用網印技術去印製上、下電極,完整製作出具有微/奈米複合結構之太陽能電池後,執行電池效能的評估與測試。 本研究所製作完成之電池,在AM 1.5G之太陽光模擬環境下,進行電池I-V特性量測,以比較不同參數下電池之短路電流密度(Jsc)、開路電壓(Voc)、串聯電阻(Rs)、並聯電阻(Rsh)、填充因子(FF)及轉換效率等特性影響。

並列摘要


Nowadays, commercial silicon solar cell usually use the random pyramid as an antireflective structure, but its antireflective performance is not very well. The improvement of antireflective performance for conventional solar cell is not easy to achieve. Therefore, this study presents the integration of photolithography and photo-assisted electrochemical etching (PAECE) to fabricate micro/nano antireflection structures with a high aspect ratio on the surface of silicon wafer. Micro/nano antireflection structures were fabricated on the N-type silicon wafers. The micro/nano antireflection structures are produced after PAECE under the etching time of 2 hr. The micro/nano antireflection structures of combining inverted pyramid, deep macroporous, micro-trench, and black membrane can be observed simultaneously. The weighted mean reflectance of a blank silicon wafer is 30.59 % in the 390900 nm wavelength regimes. Inverted pyramid arrays without PAECE can reduce the weighted mean reflectance to 14.15 %. Inverted pyramid arrays with 30 min PAECE reduce the weighted mean reflectance even to 2.21 %. Finally, screen printing technology print the upper and lower electrodes, the integrity fabrication has the micro/nano structure construction of solar cell, the implementation of the cell performance evaluation and testing. The cell produced in this study, the prepared solar cell is performed with I-V measurement under a simulated AM 1.5G condition. We compare the effect on short circuit current density (Jsc), open circuit voltage (Voc), series resistance (Rs), shunt resistance (Rsh), fill factor (FF), and conversion efficiency, etc. of different parameters.

參考文獻


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被引用紀錄


許芷維 (2015). 不銹鋼電解電刻 [master's thesis, Feng Chia University]. Airiti Library. https://doi.org/10.6341/fcu.M0226219
蔡元傑(2012)。脈衝式電鍍CuInSe2在抗反射結構基板之薄膜型太陽能電池研製〔碩士論文,國立臺灣師範大學〕。華藝線上圖書館。https://www.airitilibrary.com/Article/Detail?DocID=U0021-1610201315300950

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