透過您的圖書館登入
IP:18.227.52.208
  • 學位論文

藉由沃爾洛伊圖研究與比較鰭狀電晶體和超薄絕緣矽電晶體的功函數變異

Investigation and Comparison of Work Function Variation for FinFET and UTB SOI Devices using Voronoi Approach

指導教授 : 蘇彬

摘要


經由沃爾洛伊圖,我們不僅可以研究與比較鰭狀電晶體跟超薄膜絕緣矽電晶體上的功函數變異,且能更有效率並更具物理性地考慮晶粒間的交互作用。此外,在等效寬度及靜電完整性皆相同的條件之下,針對功函數變異,鰭狀電晶體展現出比超薄膜絕緣矽電晶體更為優秀的免疫能力,我們更進一步指出不同於其他的元件本質變異,功函數變異無法被等效氧化層厚度的微縮所抑制。除此之外我們還在雙閘極穿隧式電晶體和鰭狀電晶體兩種原件上,比較功函數變異對其的影響,在Ioff和等效寬度都相同的情況下,研究結果指出相較於雙閘極穿隧式電晶體,在較低的供應電壓下鰭狀電晶體仍舊對功函數變異有較佳的抵抗能力,此外雙閘極穿隧式電晶體電流的變異也具有很強的閘極電壓相依性。

並列摘要


Using a novel Voronoi simulation method that can physically and efficiently consider the interaction between neighboring grains, this thesis investigates and compares the impact of work function variation (WFV) on FinFET and Ultra-Thin-Body (UTB) SOI devices. Our study indicates that for a given electrostatic integrity and total effective gate area, the FinFET device exhibits better immunity to WFV than the UTB SOI counterpart. We further show that, unlike other sources of random variation, the WFV cannot be suppressed by equivalent oxide thickness (EOT) scaling. In addition, we have also compared the impact of WFV on FinFET and double gate (DG) tunneling FET (TFET) devices under comparable Ioff and effective width. We found that, unlike the FinFET device, the DG TFET exhibits significant SS variation. Moreover, the normalized drain-current variation in DG TFET shows significant Vg dependency. Compared with DG TFET devices, FinFET exhibits better immunity to WFV at very low voltage.

並列關鍵字

Voronoi FinFET UTB SOI Work Function Variation

參考文獻


[1] D. J. Frank, Y. Taur, M. Ieong, and H.-S. P. Wong, ”Monte Carlo modeling of threshold variation due to dopant fluctuations,” in VLSI Symp Tech. Dig., 1999, pp. 169-170.
[2] A. Asenov, ”Random dopant induced threshold voltage lowering and fluctuations in sub-0.1 m MOSFET’s: A 3-D ”atomistic” simulation study,” IEEE Trans. Electron Devices, vol. 45, no. 12, pp. 2505-2513, Dec. 1998.
[3] G. Roy, A. R. Brown, F. Adamu-Lema, S. Roy, and A. Asenov, ”Simulation study of individual and combined sources of intrinsic parameter fluctuations in conventional nano-MOSFETs,” IEEE Trans. Electron Devices, vol. 53, no. 12, pp. 3063-3070, Dec. 2006.
[4] Y.-S. Wu, M.-L. Fan, and P. Su, ”Investigation of Switching-Time Variations for Nanoscale MOSFETs Using the Effective-Drive-Current Approach,” IEEE Electron Device Lett., vol. 31, no. 2, pp. 162-164, Feb. 2010.
[5] X. Wang, A. R. Brown, B. Cheng, and A. Asenov, ”Statistical variability and reliability in nanoscale FinFETs,” in IEDM Tech. Dig., 2011, pp.5.4.1-5.4.4.

延伸閱讀