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  • 學位論文

微波毫米波寬頻低本地振盪驅動功率達靈頓混波器及自振混波器之研製

Design of Microwave and Millimeter-wave Broadband Low Local Oscillation Driving Power Darlington Mixers and Self-oscillating Mixer

指導教授 : 張鴻埜
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摘要


本論文主要研究使用達靈頓對實現微波及毫米波寬頻混波器,並可應用於無線通訊射頻接收機。論文中以寬頻混合達靈頓架構為基礎延伸出三種不同架構的寬頻混波器,分別為單端式達靈頓寬頻混波器、達靈頓寬頻分佈式混波器和達靈頓寬頻雙平衡式混波器。論文最後一部份為結合振盪器之升頻混波器研製。   單端式混波器使用砷化鎵0.25 μm假晶格高速電子遷移率電晶體(pHEMT)製程技術完成。電路設計使用達靈頓對可進一步降低本地振盪功率,達到寬頻及轉換增益的特性。所提出電路利用方向耦合器來耦合射頻訊號和本地振盪訊號,射頻頻寬從10到40 GHz,本地振盪驅動功率只需-5 dBm,最大的轉換增益為13.2 dB,擁有好的性能指標為3.22 GHz/mW。   達靈頓寬頻分佈式混波器使用0.18 μm SiGe BiCMOS製程完成,所提出的架構是利用混合結構NMOS-HBT(異質接面雙極性電晶體)達靈頓對實現分佈式閘極驅動混波器的增益單元裡,比起汲級驅動分佈式混波器,有效地降低本地振盪驅動功,同時具有高轉換增益。所提出電路利用二階Wilkinson功率合併器來耦合射頻訊號和本地振盪訊號,射頻頻寬可從2到67 GHz,其本地振盪驅動功率為0 dBm,最大的轉換增益5 dB,並擁有最佳的性能指標4.96及較小的晶片面積0.41 mm2。   達靈頓寬頻雙平衡式混波器是將達靈頓對、功率分配器及馬遜(Marchand)平衡非平衡轉換器應用到電路設計上,其射頻頻寬從30到67 GHz,本地振盪驅動功率為2 dBm及最大的轉換增益-5 dB,並且保有雙平衡式混波器的特性,良好的雜散訊號響應抑制量為40 dBc及埠對埠訊號隔離度大於30 dB。   自振式升頻混波器利用2 μm砷化鎵異質接面雙極性電晶體(HBT)及0.5 μm高速電子遷移率電晶體(HEMT)製程技術完成,論文主要探討混波器與壓控振盪器的結合,模擬分析四種組態的自振式混波器。由分析結果得知,異質接面雙極性電晶體-高速電子遷移率電晶體吉伯爾混波器擁有最寬的頻寬、最佳的增益頻寬乘積和較佳的相位雜訊。量測振盪頻寬範圍從19.51至21.17 GHz,在中心頻率20.34 GHz下,距偏移中心頻率1 MHz量測之輸出相位雜訊為-123 dBc/Hz。當自振式混波器操作為升頻器時,量測的上旁波帶轉換增益為-16 dB,輸入的1 dB增益壓縮點為-7 dBm。   最後,總結本篇論文所提出的電路設計與未來可改善的研究方向。

並列摘要


Several microwave and millimeter broadband mixers using Darlington cell are presented in this thesis for the receiver in wireless communication. Based on the broadband Darlington cell, three circuit topologies, including a broadband single-ended mixer, a broadband distributed mixer, and a broadband double-balanced mixer are proposed. A self-oscillation mixer (SOM) using a hybrid cascode topology is also proposed.   The broadband single-ended mixer is realized in 0.25 m GaAs enhancement/depletion-mode (E/D-mode) pseudomorphic high-electron mobility transistor (pHEMT) process. To achieve low local oscillation (LO) driving power, a Darlington cell and a directional coupler are adopted. The proposed mixer features with 3-dB bandwidth from 10 to 40 GHz, a low LO driving power of -5 dBm, a maximum conversion gain of 13.2 dB. The proposed mixer features with low LO driving power and conversion gain as compared to the bulk-driven mixer.   The broadband distributed mixer using Darlington cell is implemented using a 0.18 m SiGe BiCMOS technology. To extend the operation bandwidth, a uniform distributed topology is utilized for wideband matching. The LO driving power is further reduced as compared to the distributed drain mixer. The proposed mixer consists of a Darlington cell and a two-section Wilkinson power combiner. This mixer exhibits a broad RF bandwidth from 2 to 67 GHz, a low LO driving power of 0 dBm, a maximum conversion gain of 5 dB, and a small chip size of 0.41 mm2.   The broadband double-balanced mixer employed Darlington cell is implemented using a 0.18 m SiGe BiCMOS process. A compact Marchand balun and a Wilkinson power divider are used to generate the differential RF and LO signals for the gate-pumped mixer. Meanwhile, the high port-to-port isolations are achieved. The proposed double-balanced mixer achieves a broad RF bandwidth from 30 to 67 GHz, a low LO driving power of 2 dBm, and a conversion gain of -5 dB. Morever, the spurious suppression is better than -40 dBc due to the double-balanced topology.   The self-oscillation mixer using a GaAs 2 μm heterojunction bipolar transistor (HBT) and 0.5 μm high electron mobility transistor (HEMT) process. The HBT-HEMT cascode mixer is similar to a dual-gate mixer. The voltage-controlled oscillator (VCO) and the transconductance stage are investigated using four transistor combinations to enhance the conversion gain, bandwidth and phase noise. Among four configurations, the HBT-HEMT cascode mixer exhibits the best gain-bandwidth product, the widest bandwidth and the lower phase noise. The measured tuning range of VCO is from 19.51 to 21.17 GHz. The measured phase noise at 1-MHz offset is -123 dBc/Hz at 20.34 GHz. The measured conversion loss is 16 dB with an input 1-dB compression point of -7 dBm, as the self-oscillation mixer is performed as an up converter.   Finally, the conclusions and future works are addressed in Chapter 7.

參考文獻


[62] G. Gonzalez, Microwave Transistor Amplifiers: Analysis and Design, Englewood Cliffs, N.J.: Prentice-Hall, 1984, Chapter 5.
[64] Stephen A. Mass, Nonlinear Microwave and RF Circuits second edition, Artech House, 2003.
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[4] C.-H. Lai, Y. Kambayashi, and M. Fujishima, “60-GHz CMOS down-conversion mixer with slow-wave matching transmission lines,” in Asia–Pacific Microw. Conf., Nov. 2006, pp. 195–198.

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