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  • 學位論文

用於終極互補式金氧半電晶體之 氮化鎵基板上之高介電係數單晶氧化釓閘極層與砷化鎵基反轉通道金氧半電晶體

High κ dielectric single crystal Gd2O3 on GaN and GaAs-based inversion-channel MOSFETs for ultimate CMOS

指導教授 : 洪銘輝 黃倉秀
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摘要


由於砷化鎵基材料擁有很高的電子遷移率,目前使用高介電係數氧化層來製作三五族反轉通道金氧半電晶體受到很高的注目,以達到超越10奈米互補式金氧半電晶體的需求。其中最挑戰的議題之一,就是如何降低三五族電晶體的寄生電阻,在元件持續微縮下,接觸電阻將會是主導元件特性的關鍵。 藉由氧化鋁及氧化釓的雙層介電層,自我對準反轉通道砷化銦鎵金氧半電晶體已成功實現,於閘極長度4 μm的元件中,展示出最大汲極電流 9.5 μA/μm 以及最大轉移電導 3.9 μS/μm。這樣的元件特性能夠匹配使用原子層化學氣相沈積技術成長的氧化鋁介電層所製作的砷化鎵金氧半電晶體,無論是在砷化鎵 (001)或是砷化鎵 (111)A基板上。 除了三五族元件的製作和分析,非金的三五族歐姆接觸系統(Pd/Ge/Ti/Pt)同樣的也被研究。很低的接觸電阻約 1×10-7 Ω-cm2 被實現在高摻雜濃度的砷化銦鎵基板上,能夠被及時地利用在超越矽的互補式金氧半電晶體的製程中。此外,藉由原子層化學氣相沈積技術成長的氮化鈦,具有高溫穩定性(~ 900 ºC)的氮化鈦雙層金屬閘極層,也同時被實現,對於應用在未來自我對準反轉通道砷化銦鎵金氧半電晶體相當具有優勢。

並列摘要


The quest for technologies beyond the 10 nm node CMOS has now driven efforts in fabricating inversion-channel III-V MOSFETs with high κ dielectrics, owing to the high electron mobility in GaAs-based materials. One of the most challenging issues for realizing the high-performance GaAs-based inversion-channel MOSFETs is to decrease the parasitic series resistance, of which the contact resistance is the dominant component in the highly scaled devices. In this dissertation, we demonstrate the device performance of a 4- μm-gate-length self-aligned inversion-channel In0.2Ga0.8As MOSFET on GaAs (100) substrate using a gate dielectric of Al2O3 (3 nm thick)/GGO (8 nm thick) with a maximum drain current of 9.5 μA/μm, and an extrinsic maximum transconductance of 3.9 μS/μm. The device performances are compared favorably with those of other inversion-channel GaAs MOSFETs on GaAs (100), and also of the device on GaAs (111)A substrates using atomic layer deposited (ALD) Al2O3 as a gate dielectric. Except for the In0.2Ga0.8As inversion-channel MOSFETs, non-gold ohmic contacts of Pd/Ge/Ti/Pt have been investigated on highly doped molecular beam epitaxy (MBE) grown GaAs, In0.2Ga0.8As and In0.53Ga0.47As epilayers and a low contact resistance of 1×10-7 Ω-cm2 has been achevied on In0.53Ga0.47As, as a feasibility assessment in using these semiconductors for the post Si CMOS. In addition, high thermal stability (~900 ºC) TiN dual metal gate has been obtained by inserting an ALD-TiN layer between gate dielectric and sputtered-TiN, which is very promising for applying to self-aligned inversion-channel GaAs-based MOSFETs.

參考文獻


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