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Spread Spectrum Clock Generator

洪仕哲 , Masters  Advisor:張慶元;黃錫瑜  



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Reference ( 29 ) 〈TOP〉
  1. [2] K.-H. Cheng, C.-L. Hung, C.-H. Chang, Y.-L. Lo, W.-B. Yang , and J.-W. Miaw, "A Spread-Spectrum Clock Generator Using Fractional-N PLL Controlled Delta-Sigma Modulator for Serial-ATA III," IEEE Design and Diagnostics of Electronic Circuits and Systems DDECS,pp.1-4,April.2008
  2. [3] H.-H. Chang, I.-H. Hua, and S.-I. Liu, "A spread-spectrum clock generator with triangular modulation," IEEE J. Solid-State Circuits, vol.38, no.4, Apr .2003
  3. [4] J. Kim and P. Jun, "Dithered timing spread spectrum clock generation for reduction of electromagnetic radiated emission from high-speed digital system," IEEE Inter. Symposium on Electromagnetic Compatibility, Aug. 2002
  4. [5] M. Kokubo, T. Kawamoto, T. Oshima, T. Noto, M. Suzuki, S. Suzuki, T. Hayasaka, T. Takahashi, and J. Kasai, "Spread-spectrum clock generator for serial ATA using fractional PLL controlled by ΔΣ modulator with level shifter," IEEE Inter. Solid-State Circuits Conference Digest of Technical Papers. Feb. 2005
  5. [6] S.E. Meninger and M.H. Perrott, "A fractional- N frequency synthesizer architecture utilizing a mismatch compensated PFD/DAC structure for reduced quantization-induced phase noise," IEEE Trans. Circuits Syst. II, vol.50, no.11, Nov. 2003
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