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This work focuses the problem of increasing the integral implementation efficacy of block ciphers. It proposes a new approach to the cipher design, suitable to applications, where constrained resources are available to embedded security mechanisms, such as ad-hoc, sensor and wireless networks. The paper develops the cipher design approach based on the use of data-dependent (DD) operations (DDOs). A new class of DDO based on the advanced controlled elements (CEs) is introduced, which is proven well suited to hardware implementations, for ASIC and FPGA devices. Classification of the CEs and properties of some new DDOs are also presented. A new DDO-based cipher design is considered, which is more efficient for VLSI implementation than AES finalists and other known DDO-based ciphers. For the proposed cipher, Eagle-128, both ASIC and FPGA implementation results are presented. Finally comparisons with other published implementations are illustrated, using the Performance/Cost ratio and Performance/(Cost*Frequency) ratio indices.

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