W頻段轉導提升技術之低雜訊放大器與可調頻接收器前端設計

Design of W-band Gm-boosting Low Noise Amplifiers and Tunable Receiver Front-end

蔡行易(Tsai, Hsing I)

指導教授 ： 劉怡君

國立清華大學/電機資訊學院/電子工程研究所/碩士(2016年)

摘要

近年來在毫米波的頻段下進行通訊逐漸受到重視，而在毫米波頻段下的W-band (75-110 GHz)因其有較寬的頻寬以及不壅塞的頻譜，且能藉由較小的電路面積來實現，所以成為了通訊頻段的選擇之一。本篇論文提出了一個W-band的低雜訊放大器和兩個W-band的接收器前端電路，使用的製程是TSMC 90nm CMOS 1P9M。
本論文的第一個研究是一個W-band的低雜訊放大器，此低雜訊放大器利用變壓器來進行輸入阻抗匹配，並且使用轉導提升的技術在壘接放大器上。此低雜訊放大器的增益為6.5 dB在89 GHz，3 dB頻寬為86.8-90.9 GHz，1dB輸入壓縮點為-24 dBm，最小的雜訊係數為12 dB，消耗的功率為11.3 mW。
第二個研究是一個由低雜訊放大器和可調頻率的降頻器所組成的W-band接收器前端電路，低雜訊放大器的第一級是共源極放大器加上源極退化電感，第二級是壘接放大器加上轉導提升技術，此種放大器的架構較上一個研究有較好的折衷在增益以及雜訊。此接收器前端電路的模擬結果為變頻增益為13 dB在100 GHz和12 dB在108 GHz，最小的雜訊係數為15 dB，但是量測的變頻增益為-3.5 dB在100 GHz和1 dB在107.5 GHz，最小的雜訊係數為28 dB。增益會差如此多是因為上一個研究的增益也是下降了14 dB，而此設計的低雜訊放大器是類似上一個設計，所以增益下降的原因可能是低雜訊放大器增益過低所導致的，而此接收地前端電路的1dB輸入壓縮點為-11.6 dBm，功率消耗為113.4 mW。
第三個研究也是一個可調頻的W-band接收器前端電路，這個研究再度改良了低雜訊放大器的設計，此低雜訊放大器是單端輸入雙端輸出，第一級也是共源極放大器加上源極退化電感，接這使用變壓器將單端訊號轉為雙端，然後在差動級使用交叉耦合電容來提升增益，而在降頻器的部分則是使用雙平衡的降頻器。此接收器前端電路模擬的變頻增益為19.7 dB在96 GHz和20.8 dB在103 GHz，最小的雜訊係數為13.3 dB，1dB輸入壓縮點為-11 dBm，功率消耗為122.4 mW。

關鍵字

高頻低雜訊放大器 ； 高頻降頻器 ； 高頻接收器前端

並列摘要

In recent years, there has been an increasing interest in mm-wave communication. W-band (75-110 GHz) wireless system is a potential candidate due to its wider bandwidth, less congested spectrum and smaller circuit. In this thesis, a W-band low noise amplifier (LNA) and two W-band receiver front-ends in the TSMC 90nm CMOS 1P9M process are presented.
The first design is a W-band LNA with a shunt-series transformer feedback at the input and gm-boosting technique is used in the following cascode stage. The LNA has a measured gain of 6.5 dB at 89 GHz, a 3-dB bandwidth of 86.8-90.9 GHz, a minimum noise figure of 12 dB, an input compression point of -24 dBm, and the power consumption is 11.3 mW.
The second design consists of an improved LNA of the first one and a tunable downconversion mixer to realize a tunable W-band receiver front-end. The first stage of LNA is a common source stage with inductive degeneration and second stage of the LNA is a cascode stage with gm-boosting technique. This topology has smaller noise measure than the previous work, which means it has better trade-off between gain and noise. From simulation, this work has a conversion gain of 13 dB at 100 GHz and 12 dB at 108 GHz, and a minimum noise figure of 15 dB. However, the conversion gain drop to -3.5 dB at 100 GHz and 1 dB at 107.5 GHz, and the minimum noise figure is 28 dB. It is because the gain of the LNA in the previous work drops by 14 dB and the LNA in this work is based on the previous work, the discrepancy between the simulated and measured results can be attributed to the lower gain of the LNA. Other specifications of the receiver front-end include an input compression point of -11.6 dBm, and a power consumption of 113.4 mW.
The third work is another tunable W-band receiver front-end. This work further improves the LNA. This LNA has a single-ended input differential outputs. The common source stage with inductive degeneration is used and an on-chip balun converts the single-ended signal to differential ones. In the differential stage, a cross-coupling capacitance is added to increase the gain. The differential outputs of LNA are connected to transformers that have current gain and these transformers coupled the signal to a double-balanced mixer. The simulated conversion gain is 19.7 dB at 96 GHz and 20.8 at 103 GHz. The minimum noise figure is 13.3 dB, and input compression point of -11 dBm with a power consumption of 122.4 mW.

並列關鍵字

RF low noise amplifier ； RF downconvertion mixer ； RF receiver front-end

參考文獻

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