二硫化鎢之接觸電阻與上閘極元件之研究

Study of WS2 Contact Resistance and Top-gate Device Fabrication

林昭廷(Chao-Ting Lin)

指導教授 ： 簡昭欣

國立交通大學/電機學院/電子工程系所/碩士(2019年)

摘要

半導體產業使人類的科技進步神速，其多元的應用性以及微小的產品尺寸造福了無數人類，隨著尺寸不斷地微縮，於此同時已將技術節點微縮至數個奈米，以矽作為通道材料之半導體逐漸逼近至理論之物理極限，因此我們開始尋找替代方案，由於二維材料與生俱來之物理性質、奈米級的厚度，廣受研究者之期盼，被視為可以取代矽作為下個世代通道材料之候選人。本篇論文旨在探討二維材料中之二硫化鎢(WS2)，研究其光學與電子性質，希望於往後製程能嶄露頭角。
我們將介紹論文中不同之二硫化鎢製備方式，並且以拉曼光譜(Raman spectrum)量測檢測其訊號峰值(A1g, E12g)之波數差與比例，來得到與層數相關之訊息，再來使用光激螢光(Photoluminescence)量測分析材料之能隙(bandgap)，本篇論文量測到的二硫化鎢能隙介於1.9~2.0 eV之間，此外，我們以穿透式電子顯微鏡(TEM)來觀察合成薄膜之實際物理厚度與排列情形，並用能量色散X-射線光譜(EDS)分析實際元素之組成比例。
第二部分，我們採用傳輸線模型(TLM)來探討二階段硫化成長(two-step sulfurization)二硫化鎢之片電阻(Rsh)，以及與不同金屬接觸之接觸電阻(Rc)，我們發現鈀(Pd)金屬相較鈦(Ti)、鎢(W)金屬擁有較低的接觸電阻率(ρc)，約為5×10-3 Ω·cm2，但是擁有不佳的製程穩定度。
第三部分，我們將二階段成長之二硫化鎢薄膜作為通道材料，並以第二部分之結果，以金屬鈦作為接觸電極，製成雙閘極場效電晶體(double-gate FET)結構，於上閘極場效電晶體(top-gate FET)的電性量測及萃取中，得到了將近105倍的電流開關比(on/off ratio)，並且得到了197 mV/decade的次臨界擺幅(subthreshold swing)，此外，我們也以雙閘極結構提升開啟電流之大小，與控制閘極電壓(threshold voltage)的位置。
第四部份，我們設計了將鎢金屬作為源極(source)、汲極(drain)金屬，以其作為成核點於二氧化矽上使用化學氣相沉積(chemical vapor deposition)成長二硫化鎢薄膜，並以此薄膜作為通道材料，使用電子束(e-beam)曝光系統定義出金屬間距之短通道元件模型。實驗得出在以化學氣相沉積成長薄膜之前，使用有機溶液清洗可以改善在源極、汲極間通道之二氧化矽的表面條件，合成出較好品質的二硫化鎢。並以此薄膜做出短通道二硫化鎢背閘極場效電晶體，得到104的電流開關比，以及1.96 V/decade的次臨界擺幅，並且萃取出此元件的載子遷移率(mobility)為0.17 cm2V- 1s-1。在短通道背閘極元件的測試下可以得到如此數據，我們確信若將此二硫化鎢薄膜繼續製作成上閘極元件，且逐漸微縮閘極氧化層的厚度，可以達到更良好的電性，並期望二硫化鎢成為往後半導體製程之明日之星，作為新穎材料在產業中大放異彩。

關鍵字

二硫化鎢 ； 接觸電阻 ； 上閘極場效電晶體 ； 二維材料 ； 雙閘極場效電晶體 ； 傳輸線模型 ； 背閘極場效電晶體 ； 二階段硫化成長

並列摘要

The semiconductor industry has made human science and technology progress rapidly. Its diversified application and small product size have benefited countless human beings. As the size scaling continuously, the technology node has been reduced to several nanometers. Semiconductors with silicon as a channel material are gradually approaching the physical limitation, so we are beginning to look for alternatives, such as 2D materials. Due to the inherent physical properties and the few nanometer of thickness of two-dimensional materials, 2D materials considered to be a potential candidate to replace silicon for the next generation technology. This thesis aims to investigate the optical and electronic properties of tungsten disulfide (WS2), and hopes to integrate in the future process.
We will introduce the different preparation methods of WS2 in this thesis, and measure the wave number difference and ratio of the signal peaks (A1g, E12g) by Raman spectroscopy to get the information related to the number of layers. Then use the photoluminescence (PL) measurement to analyze the energy band gap of WS2. The energy gap of WS2 in this thesis is between 1.9~2.0 eV, basing on optical measurement. In addition, we observe the synthetic film by transmission electron microscope (TEM), including the actual physical thickness and arrangement. Finally, the composition ratio of the actual elements is analyzed by energy dispersive X-ray spectroscopy (EDS).
In the second part, we use the transmission line model (TLM) to investigate the sheet resistance (Rsh) of the two-step growth WS2 and the contact resistance (Rc) with various contact metals. We found that the contact resistance of palladium (Pd/WS2) is better than titanium (Ti/WS2) and tungsten (W/WS2), which has lower contact resistivity (ρc) of about 5×10-3 Ω·cm2. However, the process stability of Pd/WS2 is worse than the others.
In the third part, we use the two-step grown WS2 film as the channel material and the titanium metal as the contact electrode to fabricate double gate metal-oxide-semiconductor field effect transistors (DG-MOSFETs). In the electrical measurement and extraction of the top-gate field effect transistor, on/off current ratio of nearly 105 orders of magnitude and a sub-threshold swing of 197 mV/decade was obtained. In addition, by modify the back gate bias, the amount of on current can be increase and the threshold voltage can be reduce.
In the fourth part, we designed tungsten as the source and drain metal, and used it as a nucleation point to grow WS2 film on silicon dioxide (SiO2) by chemical vapor deposition. The short channel device was fabricated by using electron beam exposure system. The channel length was defined by metal spacing. The sample preparation before chemical vapor deposition growth is critical to the film quality and grain size. Based on our experimental result, the of organic solution cleaning, acetone (ACE) and isopropanol (IPA) can improve the surface conditions, therefore we can synthesize a better quality of WS2. Furthermore, we use the CVD WS2 film to fabricate short channel back-gate MOSFETs. The on/off current ratio is about 104, and the sub-threshold swing is 1.96 V/decade. Finally, the carrier mobility of this transistor is calculated to be 0.17 cm2V-1s-1. This data can be obtained under the test of the short-channel back-gate MOSFETs. We believe that if the WS2 film is fabricated as an top-gate MOSFETs and the thickness of the gate oxide is gradually reduced, a better electrical characteristic can be achieved. We are convinced that WS2 can become the most promising channel material candidate for future semiconductor manufacturing process.

並列關鍵字

tungsten disulfide ； contact resistance ； top-gate FET ； two-dimensional material ； double-gate FET ； back-gate FET ； transmission line model ； two-step sulfurization

參考文獻

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