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高性能數位訊號處理器系統之設計

High Performance DSP System Design

摘要


即時資料處理與其它高度運算量的應用,其關鍵需求在於提供高性能的處理器與快速的儲存裝置以應付大量資料的管理。本論文探討高系能數位訊號處理系統之設計,其系統平台共有六顆數位訊號處理器,每顆處理器擁有3MB的L2記憶體、256MB的外部DDR2記憶體與三個核心,所以此系統為擁有十八個核心的高性能與高密度的平台板。運用串行RapidIO技術作為處理器資料交換的基礎,配合交換器提供靈活的資料交換路徑,使得此平台適用於多項運用,包含無線多媒體、醫學影像處理等等。

並列摘要


A key requirement of real-time data acquisition and other extremely intensive computation applications is the availability of large on-chip memories to handle vast amounts of data during processing. This paper discusses the design of high performance DSP system. Each of the six on-board DSPs incorporates 3MB of local L2 RAM and connects to 256 MB external DDR2 memory. Each DSP has three optimized cores, making a total of 18 cores to combine highest performance and enhance board density. Serial RapidIO is implemented for inter-DSP communications. On-board Serial RapidIO switches support flexible data paths. The DSP Farm is ideally suited for applications including medical imaging, wireless media, and etc.

被引用紀錄


劉信龍(2009)。有關低不良率產品之統計問題研究〔博士論文,國立清華大學〕。華藝線上圖書館。https://www.airitilibrary.com/Article/Detail?DocID=U0016-1111200916024178

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