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基於3D堆疊記憶體架構之多媒體解碼效率提升技術

Enhancements of Multimedia Decoding Speed Based on 3D Stacking Memory Architecture

摘要


穿透矽通孔技術造就3D堆疊記憶體的實現,其可以應用於擴展晶片內部記憶體空間。本篇論文之3D堆疊記憶體可以被配置為每一個處理器核心的指令高速緩衝器或資料儲存器,而其資料儲存器的屬性為不可緩存(Non-cacheable)。由於新增了3D堆疊記憶體,因此程式開發人員必須重新開發適用的演算法與設計資料結構,有效地使用3D堆疊記憶體空間。為了證明3D系統的效率提升,本文基於多媒體應用HW/SW協同模擬之電子系統層級(ESL)虛擬平台進行相關應用3D堆疊記憶體之多媒體程式開發,其涵蓋了單通道H. 264解碼器、多通道H. 264解碼器與JPEG解碼器。根據實驗結果,3D系統比2D系統的效率提高了30%-50%。

並列摘要


The three-dimensional (3D) stacking memory is a good way to extend the local memory of embedded processors via the through-silicon-vias (TSVs) technology. In this paper, the 3D stacking memory could be configured as instruction cache or local data memory for each core. Due to the non-cacheable property of local memory, the programmers have to redesign the algorithm and data structure to efficiently access the 3D stacking memory space. To demonstrate the performance enhancement of 3D system, based on the electronic system-level (ESL) virtual platform of multimedia applications for HW/SW co -simulation, we develop multimedia applications including single-channel H.264 decoder, multi-channel H.264 decoder and JPEG decoder with 3D stacking memory. According to the experimental results, the 3D system performance could be improved 30%-50% than 2D system.

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