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具有頻帶外終端技術之WiMAX低雜訊放大器設計

Design of Low-Noise Amplifier with Out-of-Band Termination for WiMAX Applications

摘要


本論文採用砷化鎵(GaAs)擬態高電子移動率電晶體(PHEMT)研製應用於全球互通微波存取(WiMAX)系統之2.6 GHz高線性度低雜訊放大器混合式微波積體電路(HMIC)。因為WiMAX系統選擇頻率範圍為2.5至2.69 GHz的美國多點微波分佈式系統(MMDS)頻帶,所以設計WiMAX低雜訊放大器的中心頻率等於2.6 GHz。WiMAX低雜訊放大器利用頻帶外終端技術使輸入端的二次諧波對接地具有低阻抗的特性而予以消除。抑制二階非線性效應之低雜訊放大器可以有效提高線性度。電路實作之重要參數量測結果,雜訊指數(NF)小於2 dB,增益大於8 dB,輸入1 dB壓縮點(IP1 dB)等於0 dBm,輸入三階交越點(IIP3)等於7.5 dBm,所使用之供應電壓為1.8 V,消耗功率為8 mW。

並列摘要


A 2.6 GHz highly linear low-noise amplifier (LNA) is designed and implemented in hybrid microwave integrated circuit (HMIC) using GaAs pseudomorphic high electron mobility transistor (PHEMT) for WiMAX applications. The center frequency of a WiMAX LNA is designed at 2.6 GHz due to the selection of U.S. multi-point microwave distribution system (MMDS) band of frequency range from 2.5 to 2.69 GHz. The proposed design is based on the out-of-band termination. The second-order harmonic of a WiMAX LNA presents low impedance for grounding due to the out-of-band termination. A LNA eliminating the second-order nonlinear term enhances the linearity significantly. The crucial measured results form a WiMAX LNA in a noise figure (NF) is less than 2 dB, a power gain is greater than 8 dB, an input 1 dB compression point (IP(subscript 1 dB)) is equal to 0 dBm, and an input third-order intercept point (IIP3) is equal to 7.5 dBm. A supply voltage of 1.8 V is used and a power consumption is 8 mW.

參考文獻


IEEE Std(1999).Part11: wireless LAN medium access control (MAC) and physical layer (PHY) specifications: high-speed physical layer in the 5 GHz band.IEEE Standard.
Juha Korhonen(2003).Introduction to 3G Mobile Communication.MA:Artech House.
IEEE Std.(2005).Part 16: Air interface for fixed broadband wireless access system, Amendment 2: for physical and medium access control layers for combined fixed and mobile operation in licensed band.IEEE Standard.
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G. Vitzilaios,Y. Papananos,Theodoratos,G. K. S. Vryssas(2006).Magnetic-feedbackbased predistortion method for low-noise amplifier linearization.IEEE Trans. Circuits Syst. II, Exp. Briefs.53,1441-1445.

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