超寬頻低雜訊放大器之設計

DESIGN OF AN ULTRA-WIDEBAND CMOS LOW-NOISE AMPLIFIER

劉根龍(Ken-Lung Liu)

指導教授 ： 黃淑絹

大同大學/電機資訊學院/電機工程學系所/碩士(2009年)

摘要

本論文中依照現有寬頻放大器的架構 [1][2]，討論如何實現一超寬頻低雜訊放大器。首先我們介紹常被使用在超寬頻放大器設計中的架構並且討論其優缺點。我們從眾多的架構中選出一個省電且易商業化的架構。本論文採用共源極配上一個負回授的源極電感(Inductive source degeneration)，作用是為了產生一個實部的電阻，以便做阻抗匹配。此外，為了使其達到寬頻，在輸號入端搭配上一個多階的寬頻帶濾波器。電路設計上是使用台積電 0.18μm CMOS製程參數配合上ADS來進行此放大器的模擬及設計。此電路將以低消耗功率及低雜訊指數為主要的訴求，功率消耗為小於9mW，雜訊指數最低可到3.7dB、最大增益為9.6dB。積體電路的大小也為其中的一個重要的考慮，所以採用的電感數量將不大於5個。

關鍵字

低雜訊放大器 ； 超寬頻

並列摘要

This thesis is targeting on implementation of an UWB LNA (Ultra Wideband Low Noise Amplifier) based on papers [1] and [2]. We have first investigated the LNA architectures that have being adopted for UWB LNA designs and compared their advantages and disadvantages. One of architectures is chosen in our design because of the advantage of low power consumption and easy to commercialize. The thesis adopted common-source architecture with source inductor as a negative feedback which is being used to generate a real part of the input impedance for impedance matching. Moreover, in order to achieve wideband design, a multi-section band-pass filter has been used for input matching. TSMC 0.18μm CMOS model is used for circuit design and simulation via Agilent ADS software. The design features low power consumption and low noise figure. The LNA has 9mW maximum power consumption, 3.7dB minimum NF and 9.6dB maximum gain. The area of the LNA is also an important factor to IC design, and the number of on-chip inductors is no more than 5.

並列關鍵字

Ultra wide ； UWB ； LNA ； low-noise

參考文獻

[1] C.-F. Liao and S.-I. Liu, “A broadband noise-canceling CMOS LNA for 3.1 – 10.6GHz UWB receiver,” in Proc. 2005 IEEE Custom Integrated Circuits Conference, pp. 329-339, 2005.

[2] A. Bevilacqua and A. M. Niknejad, ”An ultrawideband CMOS low-noise amplifier for 3.1—10.6-GHz wireless receivers,” IEEE J. Solid-State Circuits, Vol. 39, No. 12, pp. 2259 -2268, Dec. 2004.

[6] Y. Lu, K. S. Yeo, A. Cabuk, J. Ma, M. A. Do, and Z. Lu, “A novel CMOS low-noise amplifier design for 3.1- to 10.6-GHz ultra-wide-band wireless receivers,” IEEE Transactions on Circuits and Systems, Vol 53, Issue 8, pp.1683 – 1692, Aug. 2006.

[3] T. H. Lee, The Design of CMOS Radio-Frequency Integrated Circuits. Cambridge University: Press, 1998.

[4] D. M. Pozar, Microwave Engineering, 2nd Edition, John Willey & Sons, 1998