- 期刊
Design and Implementation of a Low-Voltage 2.4-GHz CMOS RF Receiver Front-End for Wireless Communication
並列摘要
This paper presents the design of a 1.5V CMOS RF receiver front-end system which contains a low noise amplifier (LNA) with band pass filter and a down conversion mixer. An inter-stage matching network is added between the common-source and common-gate transistors in the LNA's first stage to further lower the noise and enhance the overall gain. An inductor is used in this inter-stage matching network because of the extra capacitive of MOSFETs in the LNA. The maximum gain achieved of this LNA is 15dB. The single square-law structure was implemented for this low power consumption and high linearity mixer. From the measured results, the whole receiver provides a conversion gain of 8.5dB at 2.4GHz with LO power input -3.5dBm. The power dissipation of this front-end is 9mW.
延伸閱讀
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