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堆疊式高介電層與金屬閘極之金氧半元件電性研究

Electrical Characteristics of MOS Devices with High-K Dielectric and Metal Gate Stacks

摘要


高介電層和金屬閘極是金氧半元件技術開發的關鍵議題,本研究以堆疊式高介電層和堆疊式金屬閘極來改善金氧半元件電特性。在第一部分的實驗結果發現,適當的堆疊式高介電層結構可以提昇金氧半元件電特性和可靠度,Al有必要遠離矽界面以減輕電荷陷阱現象。在第二部分,研究在MoN上下方分別插入TiN層之金屬閘極及改變金屬沉積後退火溫度。實驗結果顯示堆疊式金屬閘極MoN/TiN雖然功函數些許下降,但在漏電流、及可靠度等皆有較好的特性。因此MoN/TiN金屬閘極很有潛力應用在未來p型通道金氧半元件。

並列摘要


High-K dielectrics and metal gates are the key issues for MOS devices. In this study, electrical characteristics of MOS devices are improved by High-K gate dielectric and metal gate stacks. In the first part, experimental results show that electrical characteristics and reliability of MOS devices can be enhanced by proper High-K gate dielectric stacks. Al in HfAlO should be away from Si surface to reduce the effects of charge trapping. In the second part, the influences of MoN metal gate with TiN layer above or below and various post metal annealing (PMA) treatments were studied. Experimental results show that metal gate stack with TiN under MoN film (i.e., MoN⁄TiN sample) exhibits better electrical characteristics on gate leakage current, stress-induced flat-band voltage shift, and stress- induced leakage current and thermal stability despite a little lower work function. Thus MoN⁄TiN metal gate is promising for p-channel MOS device applications.

並列關鍵字

High-K Dielectric Stack HfAlO HfSiO Metal Gate High Work Function MoN TiN

被引用紀錄


呂慈航(2013)。以高功函數鎢或鉬為主金屬閘極之金氧半元件製程研究〔碩士論文,國立清華大學〕。華藝線上圖書館。https://doi.org/10.6843/NTHU.2013.00466
歐俊庭(2011)。以鎢為主高功函數金屬閘極之金氧半元件製程研究〔碩士論文,國立清華大學〕。華藝線上圖書館。https://doi.org/10.6843/NTHU.2011.00002
李茂鋅(2014)。氮化鈦成長條件對嵌入式動態隨機存取記憶體之影響〔碩士論文,中原大學〕。華藝線上圖書館。https://doi.org/10.6840/cycu201400083
呂學岳(2008)。氮化鉬與氮化鈦堆疊之高功函數堆疊式金屬閘極金氧半元件電性研究〔碩士論文,國立清華大學〕。華藝線上圖書館。https://www.airitilibrary.com/Article/Detail?DocID=U0016-2002201314362268
曾彥霖(2009)。具鉬鎢為主高功函數金屬閘極之金氧半元件製程研究〔碩士論文,國立清華大學〕。華藝線上圖書館。https://www.airitilibrary.com/Article/Detail?DocID=U0016-1111200916015304

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