使用互補式金氧半導體與整合被動元件製程之K頻段自動調整偏壓功率放大器及主動天線整合電路研究

Research on K-band Active Antenna Integrated with Adaptive-bias Power Amplifier Using CMOS and IPD Process

陳瑩嘉(Ying-Chia Chen)

指導教授 ： 林坤佑

國立臺灣大學/電機資訊學院/電信工程學研究所/碩士(2015年)

https://doi.org/10.6342/NTU.2015.00007

摘要

隨著通訊技術和資訊傳遞的快速發展，無線通訊系統需要更緊致且輕薄、同時擁有較長使用時間的發射器。功率放大器在通訊系統中扮演著不可或缺的角色，除了講求增益有放大效果以外，更要求高功率輸出和高效率的操作。由於功率放大器在發射器中消耗了主要部分的能量，因此將效率最佳化是重要的關鍵。為了擁有好的線性度和效率，近來提出許多新的功率放大器架構。
在本論文中，設計並實現了兩種電路，分別為自動調整偏壓架構的差動功率放大器，及以此電路為主體的主動整合式天線電路。前者是利用金氧半場效電晶體(CMOS)製程實現，後者為金氧半場效電晶體(CMOS)及整合被動元件(IPD)製程實現，所設計的頻率為24 GHz頻段。
第一部分實現一操作於K頻段的差動功率放大器，使用一自動調整偏壓架構以節省此放大器的靜態直流功耗，提升此放大器的操作效率。此放大器是使用0.18-μm互補式金氧半導體製作。電路的量測結果顯示，此功率放大器在靜態有104 mW的功耗，且具有6.5 dB的小訊號增益、10.5 dBm的飽和輸出功率，以及在1 dB壓縮點有10 dBm的輸出功率和3.9%的功率附加效率。
第二部分設計並實現一個在K頻段的主動整合式天線電路，包含了使用了自動調整偏壓架構的功率放大器，及一偶極天線(dipole antenna)。此電路採用了自動調整偏壓架構，改善功率放大器操作在小於1-dB壓縮點時的效率；為了減少功率放大器輸出匹配網路之損耗，天線之輸入阻抗設計為功率放大器之最大功率輸出阻抗，顯著改善功率放大器之效率。此主動整合式電路天線利用0.18-μm互補式金氧半導體來製作功率放大器，以及使用整合式被動元件製程來製作天線。電路的量測結果顯示，功率放大器在24 GHz有26.7%的最大功率附加效率，以及在1-dB壓縮點有19-dBm的輸出功率和24.1%的功率附加效率。以上量測果顯示功率放大器的效率有顯著的改善。

關鍵字

功率放大器 ； K-頻段 ； 自動調整偏壓架構 ； 巴倫器 ； 主動整合式天線電路

並列摘要

The demand for more compact, smaller size and longer using time transmitter in wireless communication system has increased according to the rapidly development of communication technique and high date-rate transmission. The power amplifiers (PA), which requires high gain, high output power and high efficiency, plays a necessary role in the communication system. Due to that power amplifier consumes the most dc power in the transmitter, the optimization of the efficiency becomes a key issue. Several new structures of power amplifier are proposed recently in order to achieve good linearity and efficiency.
In this thesis, two circuits are designed and realized. The first is a differential power amplifier using adaptive-bias technique, and the second one is an active antenna integrated with adaptive-bias power amplifier. The former is realized by 0.18-μm CMOS technology while the latter is implemented on CMOS and IPD technology. The operation frequency is 24 GHz.
The K-band differential power amplifier which adapts an adaptive-bias technique to increase the efficiency of the power amplifier is described in the first part. This power amplifier is fabricated in 0.18-µm CMOS technology. According to the measurement, the designed PA consumes 104 mW at quiescent state. The power-added-efficiency at OP1dB is 3.9% while maintaining 6.5-dB small-signal gain, 10-dBm OP1dB and 10.5-dBm Psat.
In the second part, a K-band active antenna integrated with CMOS adaptive-bias PA is proposed to improve the efficiency of the PA. This circuit includes a CMOS adaptive-bias PA and a dipole antenna; the power amplifier is realized by 0.18-µm CMOS technology and the antenna is implemented on IPD technology. The active antenna integrated with power amplifier adapts the adaptive-bias technique to improve the power amplifier efficiency under back-off operation. Besides, the input impedance of the antenna is designed to be the optimal load of the PA in order to eliminate the loss caused by output matching network, and the efficiency is improved as a consequence. The measurement results of PA shows that the peak PAE is 26.7% and PAE is 24.1% at 19-dBm OP1dB at 24GHz. The measurement results show that the efficiency of the PA is significantly improved.

並列關鍵字

Power amplifier ； K-band ； adaptive-bias technique ； balun ； active integrated antenna

參考文獻

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