在可程編系統單晶片上針對特定應用的設計方法

An Application Specific Design Methodology for System-On-a-Programmable-Chip

張郁昌(Yu-Chang Chang)

指導教授 ： 王勝德

國立臺灣大學/電機資訊學院/電機工程學研究所/碩士(2005年)

https://doi.org/10.6342/NTU.2005.00114

摘要

無資料

關鍵字

設計方法 ； 硬體加速 ； 可編程邏輯元件 ； 可程編系統單晶片 ； 有限脈衝響應濾波器

並列摘要

Field Programmable Gate Array (FPGA) technologies enabled the implementation of customizable computing platforms using System-on-a-Programmable-Chip (SOPC), where we can
configure hardware resources appropriately to match specific application needs. In this paper, a new system design concept and a system design flow are proposed for SOPC paradigm. We describe our design and implementation of an embedded system on an SOPC development board, comparing different design methodologies and implementations using FIR application. Using the proposed design flow, the development cycle can be surprisingly short and the flexibility of SOPC can make us achieve the design specification effectively.

並列關鍵字

Design Methodology ； Hardware Acceleration ； FPGA ； SOPC ； FIR

參考文獻

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