應用於可攜式感測器之系統單晶片開發平台之研究

Research of System-on-a-Chip Design Platform for Portable Sensory Applications

謝佳宏(Chia-Hong Hsieh)

指導教授 ： 鍾文耀

中原大學/工學院/電子工程研究所/碩士(2002年)

https://doi.org/10.6840/cycu200200144

摘要

現今感測系統設計趨勢中，必須具備有強大且多種的運算能力，以滿足不同的感測方式；且必須能與其他裝置或主控端溝通。若考量系統的可攜性，則尚須注意於程式碼大小以及功率消耗上。另一方面，吾人面對各種不同應用之整合，以及現今超大型積體電路愈趨複雜的設計規模，然而傳統的設計流程與方式，在複雜度與設計規模上，皆已達到近飽和的能力而不易繼續提升。而引進「平台式」的設計方式與流程之概念，則為此提供了一個良好的解決方案。
基於以上，吾人提出了一種以FORTH語言與P16微處理器為核心的單晶片設計平台，並引進且實現了WISHBONE晶片系統匯流排，以期減少未來開發複雜的多重感測系統所花費的時間與資源。
FORTH語言的發展始於1960年代末期，其語言本身是及時解譯的（Interpreting）、與使用者互動的（Interactive），並且具備有可延伸性（Extensibility），這使得以FORTH語言為基礎的嵌入式系統具備了有及時程式設計與除錯能力。P16微處理器係由丁陳漢蓀博士所設計發展，為一種針對FORTH語言作最佳化的雙堆疊型（Two-Stack）微處理器。本論文中，吾人將詳述建立此單晶片開發平台的設計方式、流程以及設計上的考量，最後以實際的應用例於FPGA環境裡，作氫離子感測系統的原型實現。

關鍵字

晶片系統匯流排 ； 微處理器 ； 雙堆疊架構 ； 系統單晶片開發平台 ； FORTH語言 ； 可攜式感測系統. ； 可程式邏輯閘陣列

並列摘要

In the trend of modern sensing technologies, in order to specify various sensing technologies, it is needed in performing complex and different computing, and having the capability to communicate with host or other devices. Furthermore, if the portability is considered, we must also focus on code size and power consumption. In additional, we are now facing the integration between different application domains and the increasing complexity and scale in current VLSI design; however, the conventional VLSI design methodology seems to achieve the capacity limitation and it is not easy to upgrade. Introducing “Platform-based” design methodology and design flow will provide a better solution to solve these problems mentioned before.

According to this, we proposed a virtual system-on-a-chip design platform based on FORTH language and P16 microprocessor, and WISHBONE on-chip bus protocol is also included and implemented to save time and resources in future developing a complex multi-sensory system and its applications.

FORTH language is developed in late 1960’s, it is interpreting and interactive, and has the capacity in extensibility. These capabilities ensure that one could program and debug the FORTH-based embedded systems in real-time. P16 microprocessors is designed and developed by Dr. Chen-Hanson Ting, and it is optimized for FORTH language because of its two-stack architecture.

In this theory, we describe the design flow, methodology, and consideration used in constructing this system-on-a-chip design platform. And we use a pH-meter sensory system as an example to use this design platform in FPGA prototyping.

並列關鍵字

On-chip bus ； and Portable sensory system. ； FPGA ； System-on-a-Chip design platform ； Microprocessor ； FORTH language ； Two-stack architecture

參考文獻

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