直流與交流於雙材料雙閘絕緣體上矽金氧半元件的分析

DC and AC Analysis of Dual Material Double Gate SOI MOS Device

黃瑞民(Rai-Min Huang)

指導教授 ： 郭正邦

國立臺灣大學/電機資訊學院/電子工程學研究所/碩士(2006年)

https://doi.org/10.6342/NTU.2006.10049

摘要

本論文中提出雙材料雙閘完全解離絕緣體上矽金氧半元件在直流與交流的分析。

第一章主要是針對SOI元件做一個簡介，說明SOI元件如何從bulk元件演化而來，並提出一個新型雙材料雙閘完全解離絕緣體上矽金氧半元件。

第二章則是探討通道長度為100奈米雙材料雙閘完全解離絕緣體上矽金氧半元件，當上閘極為N+多晶矽，下閘極分別是N+和P+多晶矽不同比例的混合和不同的薄膜摻雜濃度時，其直流現象的分析。

第三章則是探討通道長度為100奈米雙材料雙閘完全解離絕緣體上矽金氧半元件，當上閘極為N+多晶矽，下閘極分別是N+和P+多晶矽不同比例的混合和不同的薄膜摻雜濃度時，其電容現象的分析。

關鍵字

雙材料 ； 雙閘極 ； 電容

並列摘要

This thesis reports an analysis of DC and AC behavior of dual-material (DM) double-gate (DG) fully-depleted (FD) silicon on insulator (SOI) MOS device.

In chapter 1, we make an introduction for SOI device and describe its evolution from bulk device and propose a new structure called dual-material double-gate fully-depleted silicon on insulator MOS device.

In chapter 2, we discuss the DC phenomenon of a 100nm DMDG FD SOI MOS device with the N+ poly top gate and different ratio N+/P+ poly bottom gate and different thin film doping.

In chapter 3, we discuss the capacitance phenomenon of a 100nm DMDG FD SOI MOS device with the N+ poly top gate and different ratio N+/P+ poly bottom gate and different thin film doping.

並列關鍵字

dual material ； double gate ； capacitance

參考文獻

[1] A new dual-material double-gate (DMDG) nanoscale SOI MOSFET-two-dimensional analytical modeling and simulation

[2] A new dual-material double-gate (DMDG) SOI MOSFET for nanoscale CMOS design

[1] Investigation of the novel attributes of a fully depleted dual-material gate SOI MOSFET

[2] Exploring the novel characteristics of fully depleted dual-material gate (DMG) SOI MOSFET using two-dimensional numerical simulation studies

Chaudhry, A.; Kumar, M.J.;VLSI Design, 2004. Proceedings. 17th International Conference on