雙閘極電晶體臨界電壓模型模擬與無接面環繞式閘極 鍺電晶體之特性模擬

Threshold Voltage Modeling of Double Gate MOSFETs and Simulation of Junctionless Ge GAAFETs

謝岱澄(Tai-Cheng Shieh)

指導教授 ： 劉致為

國立臺灣大學/電機資訊學院/電子工程學研究所/碩士(2014年)

https://doi.org/10.6342/NTU.2014.10169

摘要

隨著摩爾定律的規則,半導體元件的尺寸持續微縮。近幾年,將傳統的元件的尺 寸按比例縮小的方式已經達到極限。為了要繼續符合摩爾定律的需求,微縮尺寸 的方向朝著以更換有著更高載子遷移率的通道材料以及創新元件結構前進。因此 鍺或其他三五族的通道材料成為近幾年熱門的研究題目,在 22nm 奈米製程結點開 始,新的 3D 鰭式電晶體結構開始取代傳統的平面式電晶體結構。 本論文中,我們利用 TCAD 電腦輔助模擬軟體來建立出雙閘極電晶體的臨界電壓 模型,並且考慮了不同通道濃度、通道寬度的影響,並且闡述其元件物理的特性。 此外也進行了在奈米尺寸具有優勢的無接面環繞式閘極電晶體的模擬與探討其物 理特性與優勢,之後更實際與真實元件作比對,並提出電晶體的改良設計方案。

關鍵字

雙閘極電晶體 ； 無接面環繞式閘極電晶體

並列摘要

Base on Moore's Law, the size of semiconductor devices continued scaling. In recent years, the conventional element method has been approached to its fundamental limit. In order to continue to follow Moore's Law, high mobility meterials and new device structures has been investigated. Therefore, germanium and other III-V channel materials become a popular research topic in recent years. Starting at 22nm tecnology node, new 3D finFET structure began to replace the traditional planar transistor structure.
In this thesis, we use TCAD simulation to create threshold voltage model of a double gate transistors. The parameter such as different channels concentration and channel width are considered in this model. The device physic of double gate transistor is also investigated. Junctionless GAAFETs are also simulated to discuss the advantages. By fitting a real junctionless GAAFETs device, the device physic can be verify and proposed design solutions and improve the design of transistors.

並列關鍵字

Double gate MOSFETs ； Junctionless Gate-All-Around FETs

參考文獻

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