極紫外光對鍺場效電晶體的影響分析與以穿隧機制建立電阻式記憶體高阻態模型

本論文中的第一部分是探討極紫外光對性能鍺金氧半場效電晶體，隨著尺寸的縮小，曝光將使用波長更小的光，且以鍺為材料的電晶體也可能用於將來更小尺寸的製程。極紫外光對場效電晶體元件的影響主要有兩個機制:第一是極紫外光會在氧化層打出正電荷。第二是在鍺與氧化鍺的介面上造成介面能接。此兩機制會使元件的臨界電壓(threshold voltage)位移與臨界擺幅(sub-threshold swing)的增加。極紫外光對二極體會造成缺陷，使得施逆向偏壓時的漏電流會增加，造成場效電晶體的汲極開關電流比值降低。極紫外光所造成的介面能接位於接近傳導能接的位置，因此p型場效電晶體與n型場效電晶體所退化的程度會不同，差別就在於臨界擺幅與臨界電壓的位移。p型場效電晶體的臨界電壓向左、n型場效電晶體的臨界電壓先向左再向右。第二部分為電阻式記憶體 (RRAM)的物理機制模型。RRAM是一種非揮發性記憶體，被視為最可能取代目前傳統快閃(flash)記憶體的候選者之一。RRAM的操作模式為利用外加電壓，可將其在低電阻態(LRS)與高電阻態之(HRS)間轉換，由此記錄邏輯之0或1。元件的製備由工研院(ITRI)提供。我們對RRAM做了許多不同的實驗，例如改變電流限流(current compliance), 最大負電壓VSTOP,以及分析RRAM 元件之串聯操作。提出物理模型來解釋。以穿隧機制為模型比對實際的量測特性且以各種不同的操作條件，並以此理論為電阻式記憶體的SPICE模型鋪路。

關鍵字

極紫外光穩定度；鍺基板場效電晶體；電阻式記憶體

並列摘要

First part of this thesis is investigating the effect of Extreme Ultra Violet (EUV) on high performance Ge MOSFETs for the considering those device will be fabricated by Extreme Ultra Violet Lithography (EUVL). The main degradations of MOSFETs are the creation of fixed charges in oxide layer and interface state near Ge/GeO2, which results the degradation of threshold voltage and sub-threshold swing. The mechanism of degraded junction characteristic is due to damage on germanium substrate, which leads to the increase of diode leakage. The creation of interface state of Ge/GeO2 under EUV irradiation is near conduction band. Therefore, the degradation of n-MOSFETs is much severer than p-MOSFETs. The second part is the model and physical mechanism of Resistive random access memory (RRAM). RRAM is one of the many types nonvolatile memory, which is the most promising candidate to replace traditional flash memory. External voltage is added on RRAM to switch the device between low resistance state (LRS) and high resistance state (HRS), and recorded to Logic 0 or 1. Our devices are prepared by Industrial Technology Research Institute (ITRI). There are different experiment tests on RRAM, such as different current compliance, maximum negative voltage Vstop. Using tunneling theory fit RRAM IV characteristic in HRS with different operation conditions for paving the way for a compact SPICE model for circuit simulation.

並列關鍵字

EUV reliability ； Ge MOSFETs ； RRAM

參考文獻

[1] Lithography in international technology roadmap for semiconductor, 2011.

[2] B. Wu and A. Kumar, "Extreme ultraviolet lithography: A review," J. Vac. Sci. Technol., vol. 25, 1743 (2007).

[3] O. Wood, C-S. Koay, and K. Petrillo, “Integration of EUV lithography in the fabrication of 22-nm node devices,” Proc. SPIE, Vol. 7271, p.727104-1-727104-9, 2009.

[5] T. Namioka, “Current research activities in the field of multilayers for soft x-rays in Japan,” Revue Phys. Appl. 23, 1711-1726.

[6] W. T. Silfvast and O. R. Wood II, “Tenth micron lithography with a 10Hz 37.2nm sodium laser,” Microelectron. Eng. 8, 3-11, 1988.

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極紫外光對鍺場效電晶體的影響分析與以穿隧機制建立電阻式記憶體高阻態模型

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