極紫外光對鍺場效電晶體及薄膜電晶體的影響分析與矽穿孔技術之模型建立

Analysis of effect of EUV on Ge MOSFET and IGZO TFT and Modeling of Through Silicon Vias

葉文德(Wen-Te Yeh)

指導教授 ： 劉致為

國立臺灣大學/電機資訊學院/光電工程學研究所/碩士(2013年)

https://doi.org/10.6342/NTU.2013.10740

摘要

在本篇論文，我們研究了極紫外光對不同元件的影響，分別為鍺場效電晶體以及銦鎵鋅氧化物薄膜電晶體。在下個世代，極紫外光為微影技術之重要關鍵，而鍺場效電晶體亦可能成為取代矽的半導體。在極紫外光照射後，鍺場效電晶體主要的影響，由於極紫外光對於氧化層與鍺及二氧化鍺介面狀態電荷造成的影響，而產生新的電荷，進而影響整個元件。這些電荷將會造成次臨界擺幅及臨界電壓之改變，甚至電流的變化。這些介面狀態會靠近傳導帶，而造成P型/N型場效電晶體之不同影響。其次，我們使用不同閘極長度之電晶體去分析極紫外光之影響，以及銦鎵鋅氧化物薄膜電晶體去分析對薄膜電晶體的影響程度。
第二部分，為了遵守摩爾定律，我們將單位面積之電晶體數目，ㄖ不斷的縮小，然而，微影技術卻會在22奈米之後，會漸漸遇到物理極限。因此，我們需要更多技術來解決這個問題。其中一種，為三維封裝積體電路，例如矽穿孔技術。矽穿孔用銅來充填，用來連接不同晶片之間訊號的傳遞。我們試著把電磁波以及半導體元件之模擬結合。我們研究矽穿孔技術的電容-電壓曲線以及改變不同結構來探討對訊號傳導之影響。讓其可以適用於半導體工業的運用。

關鍵字

極紫外光 ； 極紫外光穩定度 ； 矽穿孔電性參數 ； 矽穿孔模型建立

並列摘要

First part of this thesis is investigating the effect of Extreme Ultra Violet (EUV) on high performance Ge MOSFETs for the following considering devices which will be fabricated by Extreme Ultra Violet Lithography (EUVL). The main degradations of MOSFETs are fixed charges in oxide layer and interface state near Ge/GeO2, which will result in the degradation of threshold voltage and sub-threshold swing. The creation of interface state of Ge/GeO2 under EUV irradiation is near conduction band. Therefore, the degradation of n-MOSFETs is much more severer than p-MOSFETs. The numbers of transistor in the circuit and performance would be doubled every eighteen months. And we also use gate length spilt and IGZO TFT to analysis the model. It matches our model in this work.
Second part, to follow Moore’s law, we scaled down the transistor in the past, but the lithography technology beyond 22nm node may suffer from bottleneck. There are some technologies as solutions to the problems, one is three dimension structure likes FinFET, and another is three dimension package likes TSVs. TSVs may be filled with metal to connect the signal. We promote the model from Sentaurus simulation results and combine EM wave simulation results to make sure TSV behavior in the real case.
We do the capacitor-voltage curve and depletion calculation for preparing loss mechanism. We also adjust different kinds of the TSV conditions and enhance the full model of TSVs, such as guard ring width/ depth, input voltage, and load impedance. To sum up, we want to let the TSVs designed in IC circuit in the industry. The model should be right. This is our work.

並列關鍵字

EUV ； EUV stability ； TSV electrical parameter ； TSV loss mechanism

參考文獻

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