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  • 學位論文

應用於微波及毫米波金氧半場效電晶體壓控振盪器與除頻器之研製

Design of Microwave and Millimeter-wave CMOS VCOs and Frequency Dividers

指導教授 : 王暉

摘要


本論文主要是討論在微波及毫米波通訊系統中應用於鎖相迴路之壓控振盪器及除頻器之設計。 壓控振盪器和除頻器在鎖相迴路中是非常重要的元件。一個理想的壓控振盪器必須共振在正確的頻率和提供低的相位雜訊,否則就會影響到訊號降頻或升頻到基頻或射頻之頻段。另外一個好的除頻器除了必須提供正確的除數之外,也必須提供非常少的雜訊,這兩個元件在鎖相迴路跟頻率合成器中都要消耗掉非常大的直流功耗。 本論文中將討論兩個微波頻段的壓控振盪器及一個毫米波的除頻器。第一個利用切換電感達到寬頻且低相位雜訊效果的壓控振盪器是利用0.18微米製程來實現。利用切換電感的方式,該振盪器可以共振在3.07到3.39 GHz、3.54到3.84 GHz和4.21到4.75 GHz利用不同的電感共振,三個頻段之相位雜訊在1-MHz位移分別是-115、-104和-100 dBc/Hz。第二個壓控振盪器是利用變壓器迴授的方法達到低功耗的效果,該振盪器只在0.6伏特之電壓源之下消耗3 mW之直流功耗且可振盪在22.1到24.3 GHz,相位雜訊在1-MHz之位移是-113 dBc/Hz,利用電晶體基極端偏壓的方式可以達到極低直流功耗0.75 mW的振盪。相位雜訊此時為-96 dBc/Hz。 最後一個電路是設計於60 GHz之注入鎖定除頻器,該電路是利用一種新的變壓器耦合的架構來達到除頻之效果。此除頻器是利用台積電0.13微米製程來實現。量測結果顯示該電路在注入0 dBm之外來訊號時可達到1.8 %之鎖定頻寬,在外來訊號強度是10 dBm時可達到5 %之鎖定頻寬。此注入鎖定除頻器在0.5伏特之電壓源之下只消耗0.5 mW之直流功耗。

關鍵字

微波 毫米波 壓控振盪器 除頻器

並列摘要


Researches on voltage-controlled oscillators (VCOs) and frequency dividers in phase locked loop for microwave and millimeter-wave region are presented in this dissertation. VCOs and frequency dividers are essential building block in the phase locked loop in the transceiver system. An ideal VCO which has to oscillate at the correct frequency with low phase noise, otherwise it will affect the signal down-converting or up-converting to the baseband or Radio frequency. And a good frequency divider has to provide correct frequency division and induce less noise to the PLLs. Both of them are power hungry circuit to the PLL of frequency synthesizers. In the thesis, two Microwave VCOs and Millimeter-wave frequency divider will be discussed. Firstly, a switched-inductor VCO with wide tuning range and low phase noise is implemented in CMOS 0.18 μm process. By using the new technique of switching-inductors method, the VCO operate from 3.07 to 3.39 GHz, 3.54 to 3.84 GHz, and 4.21 to 4.75 GHz with different inductors in the LC tank. The phase noise performance at 1-MHz offset are -115, -104, and -100 dBc/Hz, respectively. Second VCO with transformer feedback is designed for low dc power consumption. Using the transformer feedback of the circuit, the VCO only consumes 3 mW from 0.6 V power supply and can oscillate from 22.1 to 24.3 GHz. The phase noise at 1-MHz offset is -113 dBc/Hz. With the body bias technique, the lowest dc power consumption can be achieved at 0.75 mW. The measured phase noise is -96 dBc/Hz at 1-MHz offset when the lowest power is applied. Finally, an injection-locked frequency divider for 60 GHz is designed. The proposed injection-locked divider is using transformer coupled technique. The circuit is implemented by TSMC 0.13 μm CMOS process. From the measured result, the divider has a locking range of 1.8 % under 0 dBm of the injected signal, and 5 % under 10 dBm. The total power consumption is only 0.5 mW from the power supply of 0.5 V.

並列關鍵字

Microwave Millimeter-wave VCO Divider

參考文獻


[1] B. Razavi, RF Microelectronics, PRENTICE HALL, 1998.
[2] T. Lee and A. Harimiri, “Oscillators phase noise: a tutorial,” IEEE J. Solid-State Circuits, vol. 35, no. 3, pp. 326-336, Mar. 2000.
[3] D. B. Lesson, “A simple model of feedback oscillator noise spectrum,” Proc. IEEE, vol. 54, pp. 329-330, Feb. 1966.
[4] P. Andreani and S. Mattisson, “On the use of MOS varactors in RF VCOs,” IEEE J. Solid-State Circuits, vol. 35, pp. 905-910, June 2000.
[5] H. M. Greenhouse, “Design of planar rectangular microelectronic inductors,” IEEE Trans. on Parts, Hybrids, and Packaging, vol. 10, pp. 101-109, June 1974.

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