毫米波頻段注入鎖定除頻器和鎖相迴路之分析及設計

Analysis and Design of Injection-Locked Frequency Dividers and Phase-Locked Loops in Millimeter-Wave Bands

林柏宇(Bo-Yu Lin)

指導教授 ： 劉深淵

國立臺灣大學/電機資訊學院/電子工程學研究所/博士(2012年)

https://doi.org/10.6342/NTU.2012.10681

摘要

自從現今CMOS技術進步到奈米等級，主動元件的速度已經大幅的增加。這也產生了許多的毫米波應用，像是60GHz的室內高速資料傳輸、24/77GHz的車用雷達、94GHz的成像系統和140GHz的點對點通訊。在這些應用中，藉由毫米波鎖相迴路產生一乾淨和穩定的時脈是很必要的。再者，操作在最高頻率的頻率除法器的設計也是充滿著挑戰性。對於電路設計者來說，在發展高操作頻率、低功率消耗的同時，也要維持較好相位雜訊表現的鎖相迴路和頻率除法器是個很充滿挑戰性的工作。
在這篇論文當中主要分為四個部分。第一個部分提及了D-頻帶注入鎖定除頻器的分析和設計。我們分析了注入鎖定除頻器和振盪器的起振條件。此外，注入鎖定除頻器的鎖定範圍也被分析。根據這些分析，六個操作在D-頻帶的注入鎖定除頻器被製造並討論。
在第二個部分，討論了兩個用於提升G-頻帶注入鎖定除頻器操作頻率和鎖定範圍的電路技巧。在第一個注入鎖定除頻器中，提出了一個電容分散技巧來提升頻率改善因子和注入範圍。此外，第二個注入鎖定除頻器則是使用了一個pi-型LC網路。藉由一個操作在第二個極點的修正型pi-型LC網路，操作頻率被提升到201GHz。
在第三個部分則討論了一個132.6GHz的鎖相迴路，使用了提出的壓控振盪器和除二注入鎖定除頻器。提出的壓控振盪器和除二注入鎖定除頻器分別操作在兩個四階LC階梯網路的第二個和第一個極點。此二者的頻率比例可以藉由改變電感值和電容值的比例而被維持。
在最後一個部分，提出了一個84GHz疊接式鎖相迴路以達到寬操作頻率和低相位雜訊。一個利用相位內差和轉導調整技巧的無變容器壓控振盪器可達到寬調整範圍。此外，在此疊接式鎖相迴路中也使用次諧波注入的技巧來達到低相位雜訊的效能。

關鍵字

毫米波 ； 注入鎖定除頻器 ； 鎖相迴路 ； 振盪器

並列摘要

Since the modern CMOS technology is advanced to a nanoscale, the speed of the active devices is dramatically increased. It inspired many millimeter-wave applications; such as 60GHz indoor high-speed data link, 24/77GHz automotive radar, 94GHz imaging system and 140GHz point-to-point communication. In these applications, it is essential to generate a clean and stable clock by using millimeter-wave Phase-Locked Loop (PLL). Furthermore, the design of the frequency divider which operates at the highest operation frequency also poses great challenge. It is a challenge work for circuit designer to develop PLLs and frequency dividers with high operation frequency, low power consumption while maintaining good phase noise performance.
In this dissertation, there are four parts. The analysis and design of the D-band Injection-Locked Frequency Dividers (ILFDs) are given in the first part. The oscillation conditions of the ILFDs and oscillators are analyzed. In addition, the locking range of the ILFDs is also analyzed. Based on these analyses, six ILFDs which operate in D-band are fabricated and discussed.
Two circuit techniques are discussed in the second part to enhance the operation frequency and locking range of the ILFD in G-band. The capacitance-splitting technique is proposed to enhance the frequency enhanced factor and the locking range in the first ILFD. Furthermore, the second ILFD with the pi-type LC network is discussed. By using a modified pi-type LC network which works at the second pole, the operation frequency is improved to 201GHz.
A 132.6GHz PLL with the proposed voltage-controlled oscillator (VCO) and a divide-by-2 ILFD is discussed in the third part. The proposed VCO and the divide-by-two ILFD operate at the higher and lower poles, respectively, of two fourth-order LC ladders. The frequency ratio between the VCO and its first divide-by-2 ILFD is kept by scaling the inductances and capacitances.
In the last part, a 84GHz cascade PLL is proposed to achieve wide operation frequency and low phase noise. A varactorless VCO with phase-interpolating technique and gm-tuning technique is used to achieve wide tuning range without using low-Q varactors. Furthermore, the subharmonic injection technique is adopted in this cascade PLL to achieve low phase noise performance.

並列關鍵字

millimeter-wave ； Injection-Locked Frequency Divider(ILFD) ； Phase-Locked Loop(PLL) ； oscillator

參考文獻

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