應變矽鍺金氧半元件及電荷儲存式記憶體之研究探討

應變技術是目前金氧半電晶體中最重要的技術，可以大幅提升電晶體通道中載子的遷移率。而記憶體元件為對於微縮最渴求的推力需求。本論文前半部分將探討應變對於元件所造成的物理及特性影響，而後半部分則著重於新型記憶體之應用與開發 (於耶魯大學馬佐平教授實驗室中完成)。而這二大部分，也希望未來能夠加以整合，以達到元件效能提升的目的。拉曼光譜為用來檢測半導體中應變的方式之一。以矽而言，在受到單軸或雙軸的伸張應變的情況下，拉曼訊號皆會紅移。然而，就晶向為(110)及(111)的鍺基板而言，在特定的電場極化方向的雷射光入射時，受到單軸伸張應力會產生拉曼訊號藍移的不尋常現象。我們利用晶格動態理論所導出的特徵方程式以及選擇定則，可以計算出此種特殊的實驗結果。並且提出最佳化的彈性常數(p, q and r)，將實驗結果與理論達到令人滿意的吻合。接下來，我們觀察成長於(001)、(110)及(111)矽基板上金氧半電容元件的平帶電壓，在外加機械應變之下的變化情形。藉由適當的理論參數模擬，我們可以解釋出，平帶電壓的改變乃是主要由於矽基的導電帶與價電帶的邊界會隨外加應變而有移動的情形。而金屬功函數受應變的變化，僅為非常微小的貢獻。我們也利用適當的參數成功地擬合還原出實驗的資料。我們也在傳統的矽基板上，利用超高真空化學沉積系統成長了一層高品質超薄矽鍺磊晶層。接著再成長一層矽磊晶層作為保護層，可以降低表面粗糙度以及與閘極氧化層的介面能態密度。利用具有以上良好特性的基板製作出p型的矽鍺通道金氧半電晶體。實驗數據顯示，電洞的遷移率與傳統矽元件相比增加為3倍。接下來進一步研究鎳鍺化合物系統的固態反應情況。我們發現了，存在了兩種電阻值不同的鎳鍺化合物的相位。同時利用X光繞射分析及穿透式電子顯微鏡的幫助，我們發現成長在鍺(110)面的鎳鍺化合物在室溫與600 ℃時會存在電阻率較高的相位(Ni5Ge3，Ni2Ge)，因此會使得在鍺(110)面上生成的鎳鍺化合物的電阻會高於在相同反應溫度下生成於(001)及(111)鍺基板上的鎳鍺化合物。同時，經由拉曼光譜的檢測，我們發現鎳鍺化合物由於具有較大的晶格常數，會對矽基板造成極大的拉伸應變。接著我們研究使用p型參雜的多晶砷化銦為閘極金屬的金氧半電容元件。由實驗結果可知厚度為一微米的多晶砷化銦已可主導閘極金屬的功函數。跟鋁閘極金屬比較，使用p型參雜的多晶砷化銦當作閘極金屬的金氧半電容的臨界電壓有正向的位移，並證明出可以應用在p型金氧半場效電晶體。我們預期利用三五族較大的能隙，可以補償由於高介電常數氧化層造成的臨界電壓飄移效應。在記憶體研究的部分(於耶魯大學馬佐平教授實驗室中完成)，因為高介電常數材料的氧化鋁有在低電場下低漏電流及在高電場下高穿隧電流的特性，因此我們用來取代MONOS型式非揮發性記憶體中的二氧化矽氧化層。我們用-14 V 10 ms抹除，可達到4V的平帶電壓横移。其10年投影預測之寫入/抹除電壓差，250 oC下為2.5 V。最後，我們也利用鐵電材料來增加非揮發性記憶體的效率。此鐵電材料特性及功能包含兩部分，多晶的態的部分作用為加強穿隧層的電場，而非晶態的部分為儲存電荷的部分。利用此新穎材料，我們可以達成極大的記憶體窗口(~20 V)。同時，穩定的窗口維持率也讓此種結構非常適合應用於多準位儲存的方式。

關鍵字

應變；矽鍺；金氧半電晶體；拉曼光譜；平帶電壓；鎳鍺化合物；砷化銦；非揮發性記憶體；鐵電材料

並列摘要

Strain technology is the most important technique in the current CMOS process, which can enhance the carrier mobilities in the channel region. On the other hand, the memory device is the most demanding driving force for the scaling. In the first part of the dissertation, we will investigate the strain effects on the physics and characteristics of the devices. For the rest part of the dissertation, the application and development of the new memory structure are studied (done at Professor T.P. Ma’s group at Yale University). We hope we can combine these two topics to enhance the device performance finally. The Raman spectroscopy is often utilized to characterize the strain in the semiconductors. For Si, the red-shifts are observed under both the uniaxial and biaxial tensile strain. However, the unusual blue-shifts of the Ge Raman peak are observed at the specific laser polarization on (110) and (111) substrates. We use the lattice dynamical theory, secular equations, and the selection rules to repeat the above mentioned peculiar experimental results. The optimized phenomenological constants (p, q and r) are also proposed to fit the experimental data successfully. Next, we investigate the flat-band voltage shifts of the metal-oxide-silicon capacitors fabricated on (001), (110), and (111) Si substrates under the external uniaxial and biaxial tensile strain. We demonstrate that the above mentioned phenomena are due to the movements of the conduction and valence band edges in the presence of the strain. The modulation of the work function of the metal gate electrode is only a minor contribution. We also fit the experimental data very well by the adequate deformation potential constants. We have successfully grown the ultra thin with high Ge content Si0.8Ge0.2 layer directly on Si by UHVCVD. A nominal 3 nm Si cap layer was also grown on top of the Si0.2Ge0.8 layer to reduce the surface roughness and for passivation. On (001) substrate, there is ~3 x hole mobility enhancement for the Si/SiGe/Si quantum well PFET as compared with the bulk Si device for <110> channel. The solid-state reaction of the Ni-Ge system is also studied. The resistivity of the NiGe phase is smaller than that of other Ni-germanide (Ni5Ge3, Ni2Ge) phases. By the powder XRD spectrum and TEM data, the Ni5Ge3 and Ni2Ge phases are observed on n-Ge (110) wafer at the room temperature and 600 ℃, causing the sheet resistance higher than the Ni/Ge samples on other orientation substrates at the same annealing temperatures. We have also used the Raman spectroscopy to characterize the strain induced by the germanide formation. Due to the larger lattice constant of the nickel-germanide, it will introduce the large tensile strain in the underlying Si substrate. Later on, the material and electrical characteristics of the MOS capacitors using the p+ poly-InAs gate electrodes are discussed. The experimental result confirms that the 1 μm poly-InAs is thick enough to dominate the work function of the gate electrodes. The threshold voltage (Vth) of the Al/p+ poly-InAs gate devices has the positive modulation as compared to the control Al gate device. We expect that the large band gap of the III-V materials can compensate the undesired threshold voltage shifts by the high-k materials. In the memory part (done at Professor T.P. Ma’s group at Yale University), the high quality, trap-less MAD Al2O3 is then used to replace the tunnel and blocking layer in the MONOS type flash memory because of the suppressed gate leakage current at the low electric field and enhanced tunneling current at the high electric field. The proposed MANAS stack is thus obtained with 4 V erase window can be achieved in 10 ms by using -14 V erase voltage. Besides, the 10-year projected retention window is as large as 2.5 V at 250 ℃. Finally, we have also utilized the ferroelectric dielectrics to enhance the efficiency of the non-volatile memory. The property and function of the proposed ferroelectric dielectric has two parts. For the poly-crystalline portion, it is used to enhance the electric field of the tunnel layer. For the amorphous part, it is used as the charge storage layer. With this novel material, the huge memory window (~20 V) can thus be obtained. Furthermore, the stable charge retention characteristics also make this novel structure suitable for the multi-level charge storage.

並列關鍵字

strain ； SiGe ； MOSFETs ； Raman spectroscopy ； flat-band voltage ； nickel-germanide ； InAs ； non-volatile memory ； ferroelectric dielectrics

參考文獻

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應變矽鍺金氧半元件及電荷儲存式記憶體之研究探討

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