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  • 學位論文

低功率預先計算為基礎的內容可定址記憶體之設計預估方法

An Estimation Approach for the Low Power Precomputation-Based Content-Addressable Memory Design

指導教授 : 賴飛羆
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摘要


內容可定址記憶體常見於需要高速搜尋比對應用當中,例如網路路由器、虛擬記憶體所使用的轉譯後備緩衝區、霍夫曼解碼與離散餘弦轉換等。由於其具備高速平行搜尋的操作特性,故所消耗的功率往往亦相當鉅額。本篇論文提出了低功率內容可定址記憶體的合成方法,並透過在預先計算區塊中引入離散均勻分布的概念,以驗證其在不同方式下所合成之適應性參數萃取器,對於整體內容可定址記憶體所能減少功率消耗的分析。故使用此方法可有效地預測功率消耗的趨勢,並指出在特定資料下,所能減少功率消耗的極佳適應性合成方式,以期達成低功率內容可定址記憶體的設計目標。根據實驗結果顯示,相較於原先參數萃取器,本篇論文提出的方法至少可降低29%的功率消耗。

並列摘要


Content addressable memory (CAM) is often used in many applications which require searching in high speed such as network router, translation look-aside buffer (TLB), Huffman decoding, discrete cosine transform or the applications having quick lookup table operation. Due to its operational characteristic of parallel data searching, the power consumption is also exacerbated. In this thesis, a methodology was proposed for synthesizing a low power pre-computation-based content addressable memory (PB-CAM) effectively. The concept of discrete uniform distribution is adopted in pre-computation block so as to verify the outcomes of power reduction when the adaptive parameter extractors are synthesized in a different manner. With our proposed approach, we are able to estimate the tendency towards power consumption efficiently and determine which type of parameter extractor is superior in power reduction for the specific data. Experiments show that the power consumption of our approach is better by at least 29% compared with original parameter extractors.

參考文獻


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