基於模擬測試圖樣至程式轉換器應用於軟體自我測試

Simulation-Based Test Patterns to Program Converter for Software-Based Self-Test

章宇翔(Yu-Hsiang Chang)

指導教授 ： 黃俊郎

國立臺灣大學/電機資訊學院/電子工程學研究所/碩士(2019年)

https://doi.org/10.6342/NTU201901857

摘要

應用軟體自我測試(software-based self-test)提供了非侵入性、功能性以及全速測試的方案，對比於傳統結構性測試，應用軟體自我測試在電路的正常工作模式中，可測試性設計電路將可以被消除，所以並不會有額外面積花費。在應用軟體自我測試中最重要的部分是產生高品質的測試程式，測試程式是測試指令串的集合，處理器執行測試程式來實現自我測試。
在本論文中，我們提出一個基於模擬的測試程式產生方式。目標是偵測出在執行應用程式或測試程式時因為電路老化缺陷而造成的硬體錯誤，我們將模擬因電路老化效應而造成的轉態延遲錯誤(transition delay fault) 以偵測其造成的現象。

關鍵字

應用軟體自我測試 ； 轉態延遲錯誤 ； 基於模擬的測試程式產生 ； 積體電路系統測試

並列摘要

The software-based self-test (SBST) provides a non-intrusive, functional and at-speed testing. Compared to conventional structural test, the SBST is applied in normal functional mode of circuit. The design for test (DFT) circuit can be eliminated, so there is no area overhead in SBST. The most important part of SBST is the high quality test program generation. A test program is a set of instruction sequences which can detect the faults. The processor execute the test program to test itself.
In this thesis, we propose a simulation-based test program generation methodology. The purpose is to detect the possible hardware faults caused by aging effect during the execution of applications or test programs. We model the fault behavior as transition delay fault models for aging fault simulation.

並列關鍵字

Software-Based Self-Test ； Transition Delay Fault ； Simulation-based Test Program Generation ； VLSI System Testing

參考文獻

T. H. Li. (2017). A Flexible Hybrid Fault Simulator for Software-Based Self-Test (Unpublished master’s thesis). National Taiwan University, Taipei, Taiwan.

T. H. Lin. (2018). Software-Based Self-Test for Aging Defect Detection (Unpublished master’s thesis). National Taiwan University, Taipei, Taiwan.

L. T. Wang, Charles E. Stroud, Nur A. Touba, System-on-Chip Test Architectures: Nanometer Design for Testability. United States: Morgan Kaufmann, 2008, ch.11.

P. C. Maxwell, V. Johansen and I. Chiang, "Functional and Scan Tests: The Effectiveness of I/sub DDQ/ How Many Fault Coverages Do We Need? ," Proceedings International Test Conference 1992, Baltimore, MD, 1992, pp. 168-177.

L. Chen, S. Dey, P. Sanchez, K. Sekar and Y. Chen, "Embedded Hardware and Software Self-Testing Methodologies for Processor Cores," Proceedings 37th Design Automation Conference, 2000, pp. 625-630.