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  • 學位論文

基於暫存器傳輸層級巨集模型和使用SystemC的系統層級功率消耗評估

System-Level Power Estimation based on RTL Macro-Modeling and Using SystemC

指導教授 : 王勝德
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摘要


因為系統單晶片(SoC)的快速發展尤其對可攜式的電子產品的高度需求量,為了讓使用者能在有限的電池能量下,有更長的使用時間,因此功率消耗成為另一個設計限制因素。再加上快速導入市場時程的壓力,系設計者需要能在更早設計階段即對功率消耗作評估分析並加速系統設計的時程。因此在論文中,主要探討的主題即為系統層級的功率消耗評估方法,基於現今主要的系統設計方法-矽智產(Intellectual Property, IP)重覆使用的概念下,我們應該亦能夠加入IP資訊再次利用的考量點。因此在論文中基於這個基本概念,延伸出一些新的看法。同時對於重覆使用資訊的方式,我們採用巨集模型的概念來重建功率消耗訊息的相關資訊,即為量測較低層級的最小操作行為模型或者基本運算的功率消耗資訊,並且於系統層級重新使用之,因此我們可基於這樣的操作行為模型去建構出系統層級的架構,進而完成系統層級的功率消耗評估模型。由實驗模擬分析的結果可得知,我們可藉由系統層級的抽象化進而提供較為快速的模擬驗證環境並提供相近程度上的準確性;相較暫存器傳輸層級的方法,我們的方法所評估出的功率消耗分析數據同樣可達相當接近的準確性;而驗證模擬所需的時間,依所架構的環境複雜度以及模組的詳細描述程度,有著加速模擬驗證數倍乃至數百倍之差。

並列摘要


In this work, the primary motivation comes from the intellectual property (IP) reuse concept. Based on the IP reuse methodology, IP information should be able to be involved to cope with more design issues and concerns. We introduce such reuse concepts into the system-level power estimation problem. So we extend some new perspectives based on the basic concept on this work. We use the RTL macro-modeling concept to perform the power consumption measurement of atomic operations or primitive operations and then model the system-level modules using SystemC based on the power consumption information of atomic operations or primitive operations. According to experiment and simulation results, we can rely on the abstraction at the system level to provide a high speed simulation environment. Comparing with the RTL approach, our system-level power estimation approach is able to provide similar accuracy while reduce the estimation cost or simulation cost to some degree depending on the complexity of simulation environments and architectures.

參考文獻


[1] S. Swan, An Introduction to System Level Modeling in SystemC 2.0, White paper, http://www.systemc.org, May 2001.
[10] F. Klein, G. Araujo, R. Azevedo, R. Leao, and L. C. V. D. Santos, "On the Limitations of Power Macromodeling Techniques," IEEE Computer Society Annual Symposium on VLSI (ISVLSI '07), pp. 395-400, Mar. 2007.
[12] ARM Software Development Toolkit, http://www.arm.com.
[14] M. Valluri and L. John, "Is Compiling for Performance == Compiling for Power?" The 5th Annual Workshop on Interaction between Compilers and Computer Architectures, Jan. 2001.
[19] T. Simunic, L. Benini, and G. D. Micheli, "Cycle accurate simulation of energy consumption in embedded systems," in Proc. Design Automation Conf., pp. 867-872, Jun. 1999.

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