- 學位論文
銦鎵系氧化物相變化記憶體與薄膜電晶體元件之研製
Fabrication and Characterization of Indium Gallium Oxide Based Phase Change Memory and Thin Film Transistor Devices
摘要
本論文以濺鍍法生長氧化銦鎵材料，深入探討其生長條件與材料特性。隨著製備條件(鍍率、氧分壓、溫度)與製備方式(共濺鍍、堆疊結構)的不同，氧化銦鎵可由導電材料轉變為半導體或絕緣材料。 氧化銦擁有低相變化溫度僅250°C，易形成 bixbyite立方的晶相，在相變化前後由於結晶相的變化，材料載子遷移率會升高，同時材料的電阻率會有相對應的變化。氧化銦的電氣傳導特性是靠材料內部氧空缺所提供的電子，若要製作半導體元件，就需要設法控制材料的氧空缺。吾人嘗試以摻雜絕緣氧化鎵以抑制氧化銦的氧空缺，並應用其半導體特性來製作二種不同的半導體元件：相變化記憶體與薄膜電晶體。 吾人利用氧化銦低相變化溫度的特性研製相變化記憶體，同時為了升高元件電阻以降低重置電流，吾人以共濺鍍法摻雜少量氧化鎵至氧化銦中。將氧化銦鎵於低氧分壓(<1×10-4托耳)環境下中速沉積(約1A/sec) 可獲得良好的相變化特性，此時電阻率約在1-103 Ohm-cm間。為提供平行的電場分布，使得材料能較容易被均勻相變化，吾人又引入上下雙加熱柱結構於氧化銦鎵相變化記憶元件中。完成的具上下雙加熱柱之記憶體元件，當加熱柱接觸面積為6.2 um2，且氧化鎵摻雜比例為0.2%時，則氧化銦鎵相變化記憶體操作所需條件如下：寫入電脈衝80 ns/ 7.25 V/ 0.8 uA；重置電脈衝20 ns/ 4.7 V/ 18 uA；寫入與重置的體積能量密度為1.77+-0.11與7.26+-0.44 pJ/um3，顯示元件內的氧化銦鎵材料在雙加熱柱結構中被完全相變化。此外，吾人分別以示差掃描熱卡量計與溫度加速法求得氧化銦與元件相變化活化能1.275+-0.005 eV，加上剖面HRTEM圖與其微區晶格結構分析，可證明氧化銦鎵相變化記憶體之電阻變化是源自於氧化銦材料因熱效應所產生的相變化。氧化銦鎵是低相變化溫度，低相變活化能的材料，這能解釋氧化銦鎵元件較傳統GST元件為低的寫入/重置電流，與僅有75°C/ 10年的資料保存時間。 緊接著我們將注意力轉到研究氧化銦鎵薄膜電晶體之上，吾人提出以結構設計取代材料混合比例的方式，來控制氧化銦鎵通道的傳導特性。此通道結構的設計概念，源自於對氧化銦與氧化鎵具備不同良傳導特性的了解：氧化銦具有高濃度氧空缺與高載子遷移率的材料，因此選來來扮演堆疊結構中的導通層；而寬能隙的氧化鎵因較不容易形成氧空缺，可作為位障層抑制氧空缺之傳導。堆疊結構的另一個好處就是堆疊中的每個氧化銦層都是由二元氧化銦化合物所構成，易藉沉積條件形成較大尺寸的晶粒，而有助於提升材料之本質載子遷移率。實驗結果如吾人所預期，氧化銦/氧化鎵堆疊結構的薄膜電阻率隨著氧化鎵厚度的上升而呈現線性上升。 而在薄膜電晶體的製作上，吾人選用絕緣性優異的高介電係數氧化鉿材料，以傳統原子層沉積法製備，選用的條件為基板溫度280°C，介電係數27.9，厚度90A。考慮功函數與金屬與氧化物的化學反應性，吾人選用了鉬金屬作歐姆接觸電極，完成的元件具閘極錯開式薄膜電晶體結構，並具有7層之氧化銦/氧化鎵堆疊結構。元件最高場效載子遷移率uFE可高達51.3cm2/Vs，同時VT,tri = 0.57 V，VT,sat = -0.04 V，ION/IOFF > 6×107，S = 0.38V/dec。顯示本實驗室所提出的氧化銦/氧化鎵堆疊通道，有助於提高氧化物通道的載子遷移率，使元件特性最佳化。 於本研究中吾人深入鑽研氧化銦與氧化鎵材料特性，同時於相變化記憶體與薄膜電晶體元件的製作與量測過程中學習許多半導體元件的分析知識，並獲致不錯的成果，然氧化物半導體屬於新興起的研究領域，尚待後續研究者繼續深入了解其材料與元件特性，並拓展其應用領域。
並列摘要
In this dissertation, the material properties and the device physics of semiconducting indium gallium oxide (IGO) are studied. Both the indium oxide and gallium odixe thin films are prepared using magnetron sputtering technique. The resistvity of indium oxide can be manipulated by modulating its growth condition and dpoing concentration of gallium, which make us possible to fabricate semiconductor devices, the phase-change memory (PCM) and the thin-film transistor (TFT), based on indium gallium oxide. We first report repetitive phase-change memory (PCM) activity via the high- to low-resistance state transition in gallium-doped indium oxide (Ga:InO) induced by nanosecond electric pulses. The amorphous-to-crystalline phase transition of Ga:InO is found to occur at a crystallization temperature of ~250oC with an activation energy of 1.27+-0.07 eV. At the phase transition, we observe a change of two orders of magnitude in the PCM-device resistance, which can be correlated to the formation of (211) and {222} crystallites of bixbyite cubic In2O3. We further investigated the phase change activities on a gallium-doped indium oxide (Ga:InO) device that can be supplied with a constant heat flow via symmetric contact to a pair of rod-like heating elements. A device set/reset current of 0.8/18 uA and resistance window of 2.6x105 to 107 Ohm can be found on Ga:InO with a 6.2 um2 device area and a thickness of 40 nm. Analysis of a log-log plot revealed slopes of 1.07+-0.01 and -1.12+-0.03 that were found to correlate with the switching current and resistance change between the high-/low-value states of the Ga:InO device area, respectively. These observations lead to the estimated energy densities of 1.77+-0.11 and 7.26+-0.44 pJ/um3 required to initiate the set and reset process in Ga:InO, respectively. A data retention time of ten years was further estimated when the Ga:InO device is operated at 75oC. According to the transmission electron microscopy analysis, these observations are correlated with an amorphous to cubic phase transition in In2O3, which takes place at a crystallization temperature of 252oC, and suggest that the phase change activities originate from the Joule heating effect. Then we report the fabrication and characterization of thin film transistors (TFTs) using reactive sputtered indium oxide (InOx) and gallium oxide (GaOx) multilayer channel in room temperature. The gate insulator is a 9 nm hafnium oxide (HfO2) grown by atomic layer deposition (ALD). The proposed TFTs with InOx/GaOx stacked channels performed good transistor characteristics: field-effect mobility (uFE) ~51.3cm2V-1s-1, subthreshold swing (S) 0.38 V/decade, and current on/off modulation ratio (ION/IOFF) >107 without any post annealing process. The channel resistivity and field-effect mobility of InOx/GaOx TFTs can be regulated by adjusting the thickness of GaOx layer to fabricate both depletion and enhancement mode TFTs. These results can be related to the neutralization of oxygen vacancies in InOx layers by GaOx in multilayer stacked structures. These results confirm that indium gallium oxide is a promising candidate of material for oxide semiconductor devices.