對於偏差隨機向量產生器實做軟硬體限制解法器

在積體電路設計與驗證的流程之中，利用限制條件來產生測試圖樣以進行隨機模擬為目前動態驗證的主流。工程師使用某些限制語法去描述硬體輸入端的行為，輔以電子設計自動化工具，自動產生大量隨機的輸入刺激以驅動硬體模擬。在這個流程中，偏差隨機向量產生器的速度，及其所產生出來的圖樣品質，是決定整個模擬系統能否有效率的達到高覆蓋率一個非常重要的關鍵。在這篇論文裡，我們分析了一些有關限制隨機模擬的方法，進而實做偏差隨機向量產生器。我們擷取了各個方法的優點，並提出「混合布林代數以及整數之決策圖」，使偏差隨機向量產生器能達到更好的表現。除此之外，我們也嘗試將此偏差隨機向量產生器實作到硬體上面。

關鍵字

驗證；測試平台；偏差隨機向量產生器；混合布林代數以及整數之決策圖

並列摘要

Constrained random simulation is the mainstream of the simulation-based functional verification methodologies for the contemporary IC (integrated circuit) design and verification flow. In this flow, designers can simply specify the constraints to confine the input behaviors of DUV (design under verification), and then the constraint solver will generate the input stimuli automatically. In order to achieve this goal, the speed of constrained random pattern generator and the quality of the patterns it generated are the most important parts that make the simulation reaching high coverage efficiently. In this work, we analyze some previous works and implement the constrained random pattern generator. We integrate the advantages of related works, and propose the mixed Boolean and Integer decision diagram (MBIDD) for the better performance. Furthermore, we also conduct the hardware implementation of the constrained random pattern generator.

並列關鍵字

Verification ； Testbench ； Constrained Random Pattern Generator ； Mixed Boolean/Integer Decision Diagram

參考文獻

[3] S. Iman and S. Joshi, The e Hardware Verification Language. Norwell, MA, USA: Kluwer Academic, 2004

[8] Devroye, L. Non-Uniform Random Variate Generation. Springer-Verlag, New York, 1986

[9] M. A. Iyer, “RACE: A word-level ATPG-based constraints solver system for smart random simulation” in IEEE Internatinoal Test Conference (ITC), pp. 299-308, Sept. 2004

[10] Kitchen, N., Kuehlmann, A. “Stimulus generation for constrained random simulation” in IEEE/ACM Int’l Conf. on CAD, pp. 258-265, Nov. 2007

[11] Kitchen, N., Kuehlmann, A. “A Markov chain Monte Carlo sampler for mixed Boolean/integer constraints” in Computer Aided Verification (CAV), pp.446-461. June 2009

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對於偏差隨機向量產生器實做軟硬體限制解法器

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