以Opencore IP 組成之系統網路晶片之研究與分析

The Research and Analysis of Network On-Chip with Opencore IP for System-On-Chip Design

彭嵩友(Sung-Yu Peng)

指導教授 ： 李維聰

淡江大學/工學院/電機工程學系碩士在職專班/碩士(2006年)

https://doi.org/10.6846/TKU.2006.00144

摘要

本論文主要是研究在嵌入式系統中，所需的IP來源來作介紹。所謂嵌入式系統是由SOC所組成。單晶片系統(SoC)為許多應用提供整合的解決方法，例如電腦系統、通訊、多媒體與消費性電子產品等。在設計單晶片系統時最主要挑戰之一是如何使工作在不同頻率、具有不同特性的異質元件間能相互通訊。而SOC是將一些所需的功能如CPU、RAM或LAN功能整合在一個晶片上。我們的研究目的是作出一網路系統晶片，此晶片具有簡單的封包辨識功能。而取得IP的主流方法是購買已授權的IP。如從ARM取得CPU的IP，從TI取得LAN的IP等等。而在這種方法下，雖然可以快速而正確的作出晶片模擬，但所需的費用卻是相當的高。在此篇論文中，我們採用了一個FREE-WEBSITE (WWW.OPENCORE.ORG)來作為IP的來源。在此網站中，我們可以取得一些FREE的IP來作應用。
我們下載了一個網路MAC來做研究與分析，其中包含了控制層的傳送與接收的功能性驗證以及一些效能上的統計等等。在控制層的傳送與接收的功能性驗證方面，我們選擇以ModelSim SE這個軟體來做編譯及模擬，從這個軟體的模擬的時序圖來分析。

關鍵字:嵌入式系統，矽智財。

關鍵字

嵌入式系統 ； 矽智財

並列摘要

This thesis is mainly studied in the embedded system, necessary IP source comes to do an introduction. The so-called embedded system consists of SOC. System-on-chip (SoC) designs provide integrated solutions to many applications such as computer systems, multimedia, consumer electronics, etc. One of the major challenges of designing a SoC chip is the communication architecture between heterogeneous components running different frequencies and possessing different characteristics. And SOC combines some necessary functions on a chip such as CPU, RAM or LAN function. Our research purpose is to make a chip of one network system having a function to distinguish packages .The major method to get IP is to buy authorized IP. For instance, we can obtain IP of CPU from ARM, or obtain IP of LAN from TI, etc. Under this kind of method, though we can make chip simulation fast and correctly, the necessary expenses are quite high. In this page thesis, the source as IP that we have adopted is from one FREE-WEBSITE (WWW.OPENCORE.ORG ). In this website, we can obtain some FREE IP to do the application, and integrate these FREE IP to a network system chip.
We use a popular language- VERILOG to build these codes. After MODELSIM compile these codes, we can simulate those waveform to make sure its function is OK.

並列關鍵字

FPGA ； OPENCORE ； SoC

參考文獻

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