以硬體EDFT為基礎之相量計算

Development of Hardware EDFT Based Phasor Calculation

鄭智遠(Chih-Yuan Cheng)

指導教授 ： 蔡孟伸

國立臺北科技大學/機電學院/自動化科技研究所/碩士(2009年)

摘要

由於離散傅立葉轉換(Discrete Fourier Transform, DFT)在頻率發生偏移時，計算上會產生洩漏現象(Leakage Error)，造成相量計算上之不準確。而經由DFT所推導出延伸之基本型EDFT(Extended Discrete Time Fourier Transform)演算法能夠修正因來源訊號或是經由類比數位轉換器(Analog to Digital converter, ADC)取樣後產生之頻率偏移。配合移動視窗之概念，使其演算法能夠在每一次取樣之後，能夠迅速且正確的求取輸入信號之基頻相量，進而求得振幅、相位差與頻率，使計算結果可廣泛應用在電力量測與設備。
為補足在多點取樣時，軟體計算無法在取樣間隔的時間內完成計算的問題，本論文將演算法建構在硬體上，以提升整體運算效能。本論文並配合使用CORDIC 演算法取代查表法，以處理EDFT演算法所需要之三角函數與反三角函數計算，提升計算效能與精度並減少邏輯元件之使用量。本論文並針對對各種不同複數運算下，使用不同之硬體設計方式，如修正振幅運算、頻率運算等逐一比較。
本論文之硬體架構採用VHDL(Very High Speed Integrated Circuit Hardware Description Language, VHDL)建置模組，並使用Modelsim模擬軟體進行模擬以確認硬體設計的正確性，最後再將完整的設計合成於FPGA上。開發完成的系統並經由直接頻率合成器(Direct Digital Frequency Synthesizer, DDFS)所產生之模擬信號，加以驗證。

關鍵字

延伸式離散傅立葉轉換 ； CORDIC演算法 ； 相量計算 ； FPGA

並列摘要

When frequency shifts, the leakage error will occur during Discrete Fourier Transform (DFT) calculation. The phasor calculation will be in-accurate due to the leakage error. The Extended Discrete Fourier Transform (EDFT) that is extended from basic DFT is able to correct the errors due to the frequency shifting. By applying moving window technique, EDFT is able to find the fundamental frequency phasor accurately. The magnitude, phase difference and frequency can be obtained and applied to electric power measurements and equipment.
In order to perform EDFT calculation within two samples, the algorithm is implemented in hardware in order to improve the performance. Instead of using lookup tables, this thesis applied COordinate Rotation DIgital Computer (CORDIC) for calculating Trigonometric and inverse Trigonometric functions. By applying CORDIC, the precision can be improved while the usages of logic elements can be reduced. Comparisons were performed in different calculation methods such as magnitude and frequency calculations.
Very High Speed Integrated Circuit Hardware Description Language (VHDL) is used to implement the algorithm. Verification is done by using Modelsim Package. The developed system is downloaded into a hardware platform. Direct Digital Frequency Synthesizer (DDFS) is used to generated controlable three-phase signals in order to verify and validate the design.

並列關鍵字

Extended Discrete Fourier Transform (EDFT) ； CORDIC Algorithms ； Phasor Calculation ； FPGA

參考文獻

[10] 洪培倫，用於保護電驛之直流偏移消除技術數位積體電路設計，碩士論文，國立台灣大學電機工程學研究所，台北，2004。

[18] Altera Corporation, Avalon Memory-Mapped Interface Specification, Altera Corporation, May 2007.

[1] A. G. Phadke, J. S. Thorp and M. G. Adamiak, “A New Measurement Technique for Tracking Voltage Phasor, Local System Frequency, and Rate of Change of Frequency,” IEEE Trans. on Power Apparatus and Systems, vol. PAS-102, no. 5, May 1983, pp. 1025-1038.

[2] G. Misout and P. Girard, “Measurement of Bus Voltage Angle Between Montreal and Sept-Iles,” IEEE Trans. on Power Apparatus and Systems, vol. PAS-99, no. 2, March/April. 1980, pp. 536-539.

[3] M. S. Sachdev and M. M. Giray, “A Least Error Squares Technique for Determining Power System Frequency,” IEEE Trans. on Power Apparatus and Systems, vol. PAS-104, no. 2, Feb. 1985, pp. 437-444.