使用分佈式主動變壓器之5.2 GHz CMOS功率放大器

The design of 5.2GHz CMOS power amplifier by using the Distributed Active-Transformer

李明遠(Ming-Yuan Lee)

指導教授 ： 呂振森 ； 宋國明

國立臺北科技大學/電資學院/電機工程系研究所/碩士(2009年)

摘要

目前在CMOS功率放大器的文獻中，輸出功率受限於其崩潰電壓，而使設計者不得不限制操作電壓在功率電晶體尚可承受的範圍。本文使用一個近年來興起的分佈式主動變壓器(Distributed Active Transformer, DAT)電路將一平行輸入的差分功率放大器電壓分別耦合到二次側電感，然後將輸出串聯起來，並且電壓的提升使得原本需要高Q值的阻抗轉換變得更容易實現。
本篇論文主要探討使用分佈式主動變壓器來進行阻抗匹配，並將轉換效率提到最高，減小損耗值，最終再將各別的差分功率放大器在輸出端合併，利用ADS高頻電磁模擬，完成DAT，利用金屬層疊式架構設計出一個K值(Coupling Factor)為0.8的DAT。
本次利用ADS高頻模擬軟體來設計工作頻率在5.2GHz，模擬的最大輸出功率1W，輸出P1dB、功率附加效率(Power Added Efficiency, PAE)和線性功率增益分別為25.898dBm、13%和12.644dB的功率放大器。晶片製作是利用TSMC 0.18μm 1P6M製程實現，其核心面積為0.953*1.053 mm2。

關鍵字

分佈式主動變壓器 ； 功率合併 ； CMOS功率放大器 ； 阻抗轉換

並列摘要

In some recently papers of CMOS power amplifier, the breakdown voltage of device limits the output power, so designer have to reduce voltage and then power MOS could afford. In this thesis, using a distributed active transformer to couple parallel input differential power amplifier to secondary inductor, and then the voltage is added. Increasing could make impedance transform easier and realize.
This thesis discuss using distributed active transformer to make impedance transform, and increasing the transform efficiency to maximum, and reducing loss. Finally, each differential power amplifier is combined to the output. Use ADS EM tool completing a DAT by metal stack which coupling factor is 0.8.
In this thesis, a power amplifier is designed for 5.2GHz WLAN application, maximum output power is 1W, circuit has been simulated and shown 25.898dBm output P1dB with 13% PAE, the power gain is 12.644dB. Chip was have been implemented in a standard 0.18um TSMC CMOS technology. The total active area is 0.953*1.053 mm2.

並列關鍵字

Distributed Active Transformer ； Power Combining ； CMOS Power Amplifier ； Impedance Transform

參考文獻

[1]　R. Gilmore and L. Besser, Practical RF Circuit Design for Modern Wireless Systems Volume II：Active Circuits and Systems, Artech House, 2003.

[9]　S. C. Cripps, RF Power Amplifiers for Wireless Communications, Second Edition, Norwood, MA: Artech House, 2006.

[12]　P. Asbeck, C. Fallesen, “A 29dBm 1.9GHz Class B Power Amplifier in a digital CMOS Process,” Electronics, Circuits and System, 2000. ICECS 2000.

[13] J. Scholvin, D. R. Greenberg, and J. A. del Alamo, “Fundamental power and frequency limits of deeply-scaled CMOS for RF power applications,” Technical Digest - International Electron Devices Meeting, IEDM ,2006, art. no. 4154436.

[14] S. Kim, K. Lee, J. Lee, B. Kim, S. D. Kee, I Aoki, and D. B. Rutledge, “An Optimized Design of Distributed Active Transformer,” IEEE Trans. Microw. Theory Tech, JANUARY 2005, VOL. 53, NO. 1.