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  • 學位論文

應用於晶片網路之預測式動態虛擬通道配置策略

Allocation Strategy of Predictable Dynamic Virtual Channel for Network-on-Chip

指導教授 : 李宗演

摘要


在目前的研究中,晶片網路(Network-on-Chip,NoC)被用來解決晶片系統(System-on-Chip,SoC)中的資料傳輸問題。而在晶片網路中,路由器內的緩衝器(buffer)為最大的功率消耗來源,增加緩衝器的數目雖然能明顯地改善內部交換網路的效能,但要付出的代價則為較高的功率損耗及面積,因此如何控制緩衝器的分配是很重要的問題。在這方面,可以利用蟲洞交換技術(wormhole switching)方法來減少緩衝器的尺寸大小。另一方面也必須考慮到資料傳輸的延遲問題,為了達到延遲的最小化,使用虛擬通道(virtual channel)技術出來解決這個問題。然而,使用虛擬通道後,所需的緩衝器將會是原本設計的數倍,如此一來,需要更大的面積空間與功率消耗。因此如何針對當下晶片網路中的資料流量狀況,有效地配置相對應的虛擬通道數量將是我們所要達到的目的。為了提高在晶片網路中的虛擬通道配置的效能,本論文提出一個預測式動態虛擬通道配置(Dynamic Virtual Channel Allocation,DVCA)管理方法,本方法是利用資料流量(traffic)的高低狀態及過往緩衝器(buffer)的使用率,動態地預測在下一個週期內所需要被開啟的虛擬通道個數,並依據資料流量傳輸大小,分別配置所需的虛擬通道數目到其對應的輸入通道上。由實驗結果得到,本方法在下一個觀察週期中的資料傳輸流量及虛擬通道開啟個數的預測率分別可以改善5.46 %與11.12 %。

並列摘要


Nowadays, Network-on-Chip (NoC) has been proposed to solve the problems of power consumption and communication delay in System-on-Chip (SoC). In the NoC, among different components of router, the buffers consume a large amount power. But the increase in the number of buffers can significantly improve the effectiveness of the interaction network, the cost of the buffer is higher power consumption and larger area. So we can find that how to control the buffer allocation is a very important issue. Usually, we can use wormhole switching technique to reduce the buffer size. On the other hand, we must also consider the data transmission delay, in order to achieve the minimum of delay, the virtual channel (VC) technology out of the problem. However, the use of virtual channels, the required buffers will be the original several times, the area required more space and power consumption. So how to present the information of the network traffic conditions, and allocate the corresponding virtual channels will be our objective to be achieved. In this work, we present a predictable dynamic virtual channels allocation (DVCA) strategy for adjusting the number of virtual channels in Network-on-Chip. This approach uses the traffic conditions and past buffer utilization in the channel to dynamically predict the number of virtual channels that should be active. In this approach, for different traffic conditions, the numbers of VCs are allocated to the corresponding channels. The experimental results show that the proposed approach can improve 5.46% on prediction of data communication and 11.12% on number of virtual channel prediction.

參考文獻


[1] L. Benini and G. D. Micheli, “Networks on Chips: A New SoC Paradigm,” IEEE Computer, vol. 35, January, 2002, pp. 70 – 78.
[2] P. Guerrier and A. Greiner, “A Generic Architecture for On-Chip Packet-Switched Interconnections,” in Proceedings of Design Automation and Test in Europe, Paris, 2000, pp. 250 – 256.
[4] L. M. Ni and P. K. McKinley, “A Survey of Wormhole Routing Techniques in Direct Networks,” IEEE Computer, vol. 26, no. 2, pp. 62 – 76, Feb. 1993.
[7] Jie Wu, “A Fault-Tolerant and Deadlock-Free Routing Protocol in 2D Meshes Base on Odd-Even Turn Model,” IEEE Transactions on Computers, vol.52, pp. 1154 – 1169, Sept. 2003.
[8] R. Holsmark, M. Palesi and S. Kumar, “Deadlock Free Routing Algorithms for Mesh Topology NoC Systems with Regions,” in Proceedings of the 9th EUROMICRO Conference on Digital System Design (DSD), pp. 696 – 703, 2006.

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