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  • 學位論文

可重組態LEON架構之設計

Design of a Reconfigurable LEON Architecture

指導教授 : 黃朝章
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摘要


本論文提出利用LEON 架構為基底設計內嵌式系統之可重組態架構,我們利用FPGA(Field Programmable Gate Array)的可程式化的特性,加上Xilinx公司的Vertex II系列晶片,該晶片擁有RTR(Run Time Reconfigurable)功能,此功能具有部分可重組態特性,可使整個FPGA晶片,可以只更改某部份區域的電路,其他部份電路不會改變,同時當FPGA晶片進行重組態時,沒有被組態的區域仍可維持其運作,不需停頓整體工作。因此,我們選擇一個Open Source 的LEON架構作為我們系統運作的主體,由於它是開放的架構,可以讓我們修改內部的結構,藉由LEON維持系統的運作,另製作一個可重組態的Co-Processor作為LEON系統外加的計算體,有了這項優勢我們便可在系統還在運作的情況之下,隨著不同的應用運算彈性提供不同功能的Co-Processor,卻不用更改實體的硬體設備。

關鍵字

可重組態 嵌入式系統 計算體 主體 整體 架構 工作

並列摘要


This thesis proposes a design method of a reconfigurable embedded system based on LEON architecture. We can utilize the FPGA with programmable feature. And use Vertex-II chip of Xilinx with Run Time Reconfigurable feature. These features provide partial reconfiguration to change partial circuit of the FPGA chip as the other circuit unchanged. Daring the FPGA is reconfiguring, the unchanged part is still work. According to the above-mentioned feature, we selected an open source LEON architecture as the main part of system. It is an open architecture, so we can modify inside structure. LEON architecture maintains the operation of system and builds a reconfigurable Co-Processor. This Co-Processor can be looked as an additional processor. With this advantage the system can keep on work as build the different function Co-Processor following the different application operation. And the whole system hardware doesn’t be changed.

並列關鍵字

Reconfiguration FPGA design system

參考文獻


[1] C. Bobda, M. Huebner, A. Niyonkuru, Brandon Blodget,Mateusz Majer, Ali Ahmadinia "Designing Partial and Dynamically Reconfigurable Applications on Xilinx Virtex-II FPGAs using Handel-C" University of Erlangen-Nuremberg, Departement of Computer Science 12, Dec 2004
[2] J. R. Hauser and J. Wawrzynek, "Garp: A MIPS Processor with a Reconfigurable Co-processor" Proc. of the IEEE Symposium on FPGAs for Custom Computing Machines, April 1997
[5] B. Blodget, C. Bobda, M. Huebner, and A. Niyonkuru "Partial and Dynamically Reconfiguration of Xilinx Virtex-II FPGAs" in Springer-Verlag Berlin Heidelberg 2004
[9] Memec Design, Inc. "P160 Communications Module User Guide Version 2.0" December 2002
[12] Jiri Gaisler "The LEON/ERC32 GNU Cross-Compiler System Version 1.1.5" July 2002

被引用紀錄


林之棟(2006)。重組態架構系統資源監控單元之設計〔碩士論文,元智大學〕。華藝線上圖書館。https://doi.org/10.6838/YZU.2006.00069
洪億樹(2008)。利用部分重組態架構實現多重功能單元之設計〔碩士論文,元智大學〕。華藝線上圖書館。https://www.airitilibrary.com/Article/Detail?DocID=U0009-0207200815380700

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