由於嵌入式系統受限於資源及嚴格條件的限制,軟體設計人員現在必須考慮他們的決定對於軟體大小、執行時間及功率消秏上的衝擊為何。 現今數位訊號處理器之編譯器並不能針對目標機器架構的特性來產生有效率的程式碼。 這激發了我們針對目標機器指令集架構的特性來實作一個編譯器。 我們針對ARM7TDMI處理器之ARM指令集,在SUIF及Machine SUIF編譯器基礎架構之上,著眼於開發一個正確的編譯器。 並以一系列特別設計及公開取得的標準測試程式來驗証這編譯器。 雖然仍然有些許的錯誤存在,但驗証的結果是令人鼓舞的。
Under the limited resources and stringent constraints on embedded systems, software designers now are encouraged to consider the impact of their decisions on code size, running time, and power consumption. Current compilers for modern DSP processors are not able to produce efficient code featuring the target architectural specifics. It thus motivates us to implement a compiler featuring the specifics of the target instruction set architecture. We focus on developing a correct compiler for the ARM instruction set of the ARM7TDMI processor. Our compiler is built upon SUIF and Machine SUIF compiler infrastructures. A suite of well-designed and public benchmark programs is used to verify the compiler. The results are encouraging though there still exist some bugs.