UWB無線通訊接收機射頻前端電路研製

Designs and Implementations of RF Receiver Circuits for UWB system

張恩瑞(En-Rui Chang)

指導教授 ： 黃建彰

元智大學/工程學院/通訊工程學系/碩士(2006年)

摘要

本論文以TSMC 0.18μm 1P6M CMOS製程來研製應用於UWB無線通訊射頻接收機前端電路設計，包含低雜訊放大器、混頻器以及壓控振盪器。
低雜訊放大器的電路設計上，在前端使用LC-tank減少輸入阻抗的返回損耗並可減少由負回授所帶來的雜訊干擾；同時使用正回授電路，可在低功率的情況下得到高增益。量測結果低雜訊放大器放大頻率為2.4至3.5 GHz，增益為6 ~ 9 dB，雜訊指數為4.5 dB左右，輸入P1dB為-15 dBm。主動雙端平衡混頻器電路設計上，主要是使用MGT (Multiple Gated Transistors)的方式達到高線性度，並且使用電流摺疊的方式達到低功率效果，其模擬結果為操作頻率在3 ~ 6 GHz時，其轉換增益為4 ~ 7 dBm，雜訊指數為11 dB左右，輸入P1dB為-5 dBm，輸入三階截斷點為5 dBm。雙頻帶壓控振盪器的電路設計主要是藉由切換電容達到雙頻帶效果，同時使用電晶體交連耦合對(cross-coupled pair)並聯達到低相位雜訊的效果，其模擬結果操作頻率分別為4.72與5.42 GHz，在0 ~ 1.2 V控制電壓其輸出頻率為4725 ~ 5003 MHz與5421 ~ 5837 MHz，相位雜訊分別為-122.36 dBc/Hz@1 MHz與-121.6 dBc/Hz@1 MHz。

關鍵字

超寬頻 ； 接收機

並列摘要

This thesis presents the developments of receiver RFICs for Ultra-Wide Band (UWB) system with the TSMC 0.18um 1P6M CMOS process. The designed ICs include low noise amplifier (LNA), down-convert mixer, and voltage control oscillator (VCO).
The circuit design of LNA uses a LC-tank to reduce the input return loss and the noise from the resistive negative feedback. The LNA also employs the positive-feedback capacitor to acquire the higher gain with low DC power consumption. The measured performances are as follows: the bandwidth 2.4 ~ 3.5 GHz, gain in 6 ~ 9 dB, noise figure in 4.5 dB, and input 1 dB gain-compression point in ?{15 dBm.
The circuit design of mixer uses the Multiple-Gated-Transistors (MGT) to achieve the higher linearity and the current-folded configuration to lower the DC power consumption. The simulation performances are as follows: the bandwidth 3 ~ 6 GHz, gain in 4 ~ 7 dB, noise figure in 11 dB, input 1 dB gain-compression point in ?{5 dBm, and the input third-intercept-point in about 5 dBm.
The circuit design of VCO uses the method of switching capacitors to accomplish the dual-band function while the two cross-coupled pair architecture maintain the low phase noise characteristics. The simulation performances are as follows: frequency-controlled ranges 4.725~5.003 GHz and 5.421~5.837 GHz with phase noise of ?{122.36 dBc/Hz at 1 MHz frequency offset and ?{121.6 dBc/Hz at 1 MHz frequency offset respectively.

並列關鍵字

UWB ； Receiver ； CMOS

參考文獻

[17] 溫清華，《Design of RF CMOS IC》，國家晶片系統設計中心講義，2004。

for Wireless Personal Area Networks (WPANs), http://grouper.ieee.org/groups/

Personal Area Networks (WPANs), http://grouper.ieee.org/ groups/802/15/pub/

[7] 梁清標，〈應用於無線通訊射頻接收機之電路研製〉，元智大學碩士論文，2005。

[8] 李菘茂，〈應用於WLAN 802.11a 系統之微波功率放大器設計與製作〉，元智大學碩士論文，2005。