應用於無線通訊射頻接收機之電路研製

Design and Implementations of RF Receiver Circuits for Wireless Communication Applications

梁清標(Ching-Piao Liang)

指導教授 ： 黃建彰

元智大學/工程學院/通訊工程學系/碩士(2005年)

摘要

無資料

關鍵字

射頻電路 ； 低雜訊放大器 ； 混頻器 ； 壓控振盪器 ； 接收機

並列摘要

This thesis presents the development of CMOS RFIC’s for wireless communication receiver front-end with TSMC 0.18um 1P6M CMOS processes. The CMOS RF receiver includes low noise amplifiers(LNA’s), down-conversion mixer, and voltage control oscillator(VCO).
The first part studies on the quadruple-band LNA design with gain-controlled function, where the quadruple-bands are 1.8/2.4/5.2/5.9 GHz. The measured performances are as follows: in high gain state, input return loss are 14.4/10.2/10.4/4.2 dB, output return loss are 16.9/11.5/8.5/11.7 dB, gains are about 8.0/5.4/10.5/7.0 dB, input power at 1dB gain compression points are -10/-9/-14/-10 dBm, input third intercept points are -1/0/-5/0 dBm; in low gain state, input return loss are 11.5/10.7/11.8/6.3 dB, output return loss are 13.2/12.4/9.6/13.6 dB, input power at 1dB gain compression points are -2/0/-3/-3 dBm; and gain-controlled ranges are 10.2/10.3/13.4/8.8 dB respectively.
The second part studies on quadruple-band LNA design with adjustable image-rejected bands and gain-controlled functions. The frequencies are 2.0/2.4/5.2/5.9 GHz, and the simulation performances are as follows: in high gain state, input and output return loss are greater than 10 dB, gains are 11.2/10.8/10.2/8.3 dB, noise figures are 2.0/2.9/3.1/3.4 dB, input power at 1dB gain compression points are greater than –18 dBm, and input third intercept points are greater than –10.5 dBm. The integral gain-controlled ranges are greater than 12dB and image-rejected ranges are greater than 15dB respectively.
The third part is a broadband LNA with gain-controlled function. The bandwidth is from 0.3 GHz to 5.1 GHz. The measured performances are as follows: in high gain state, input and output return loss are greater than 8 dB, gains are between 10 dB and 7 dB, input power at 1dB gain compression points are greater than –17 dBm, and input third intercept points are greater than –6 dBm. The integral gain-controlled ranges are greater than 8.5 dB.
The fourth part is a dual-band down-conversion mixer with image-rejection function operates at 2.4/5.2 GHz. The simulation performances are as follows: input and output return loss are greater than 10 dB, isolations are greater than 53 dB, conversion gains are 9.1/4.4 dB, noise figures are 5.7/10.7 dB, input power at 1dB gain compression points are –18/-11.5 dBm, and input third intercept points are –9.4/0.1 dBm respectively.
The fifth part is a dual-band VCO designs at 1.9/4.7 GHz. The simulation performances are as follows: output powers are -1.85/-5.2 dBm, frequency-controlled ranges are 1.785~1.82/3.72~3.94 GHz.

並列關鍵字

RF ； LNA ； Mixer ； VCO ； Receiver

參考文獻

[2] B. Leung, VLSI for Wireless Communication, Prentice Hall, 2002.

[4] 戴文彬，〈應用於無線數位通訊次諧波混頻器之設計、製作和測試〉，元智大學碩士論文，2004。

[5] C. H. Liao and H. R. Chuang, “A 5.7-GHz 0.18-um CMOS gain-controlled differential LNA with current reuse for WLAN receiver,” IEEE Microwave and Wireless Components Letters, vol. 13, pp. 526-528, Dec. 2003.

[6] C. F. Jou, K. H. Cheng, P. R. Huang and M. C. Chen, “Design of a fully integrated high linearity dual-band CMOS LNA,” in IEEE International Conference on Electronics, Circuits and Systems, Dec. 2003, pp. 978-981.

[7] Y. C. Chen and S. S. Lu, “Analysis and Design of CMOS Broadband Amplifier with Dual Feedback Loops,” in IEEE Asia-Pacific Conference Proceedings, Aug. 2002, pp. 245-248.