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  • 學位論文

晶圓元件寬頻校正與去嵌化技術之研究

Wafer components of the broadband calibration and De-embedding technology research

指導教授 : 黃建彰

摘要


本篇論文應用多種校正方法於GaAs 0.15μm p-HEMT、TSMC 0.18μm 晶圓元件S 參數量測上,發展出一階段式L-OS-OT(Line – Offset-Series – Offset-shunT)校正方法於晶圓毫米波元件之特性量測, 與在二段式的校正技術作比較,並且運用於差動式晶圓校正上。利用 商用之標準阻抗基板(Impedance Standard Substrate, ISS)執行LRM、 LRRM 校正使量測參考平面至探針尖端,再使用自行設計之校正件求 出晶圓探針之嵌入式誤差項, 並用逆運算方式進行去嵌化 (De-embedding)以獲得待測物的實際散射參數。此外,也計算出其傳 輸線之特性阻抗,藉由特性阻抗轉換的方式,求出最後待測物實際的 真正特性。校正理論使用Agilent ADS 模擬軟體模擬整個量測環境, 其校正寬頻效果可以得到證實。

並列摘要


This thesis presents a variety of calibration methods for on-wafer S-parameters measurement of GaAs 0.15μm p-HEMT and TSMC 0.18μm devices, and advance one tier L-OS-OT(Line – Offset-Series – Offset-shunT) calibration to millimeter-wave devices of characteristics measured, to compare with two-tier calibration technique, and uses for on-wafer differential calibration. By using the commercial impedance standard substrate (ISS) to shift the reference plane to the probe tips. Next, the in-house calibration kit is used to obtain the embedded error, and the whole de-embedded process is done by using the inverse operation to acquire the actual S-parameter of the device-under-test (DUT). In addition, characteristic data impedance of the transmission line also is be evaluated. The DUT of real characteristic data finally can be extracted by the method of characteristic impedance mapping. By using Agilent ADS simulation software to simulation environment for the whole measurement, the broadband calibration results can be confirmed.

參考文獻


calibrations for four-sampler vector network analyzers , ” IEEE Transactions on
[3] Marks, Roger B., “ Formulations of the Basic Vector Network Analyzer Error
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