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  • 學位論文

薄膜電晶體各種效應與照光操作之下的特性分析

Analysis of thin-film transistors with various nonidealities and light illumination

指導教授 : 洪勝富
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摘要


在論文第一部份的研究,是模擬在薄膜電晶體製程步驟中,有一些缺陷對電流-電壓曲線所造成的影響。所以就元件軟體內的材料設定作改變,模擬改變結構部份區域來探討影響的情況。 論文第二部份,提出整合非揮發性記憶體結構(N通道)在每一個畫素中的想法,以通道二次電子注入機制與通道熱載子注入機制為基礎,我們期望非揮發性記憶體結構在有照光條件操作寫入下,會比未照光操作下注入更多的負電荷於浮動閘極內,因此會有較高的臨界電壓,導致發光二極體的亮度變暗。所以若將較亮的面板區域按此想法操作下,會使得亮度變暗,有利於達到亮度均勻和顏色均勻的情況。所以本論文則是建構非揮發記憶體結構,模擬在照光與未照光下的臨界電壓偏移情況,並改進結構使得在照光和未照光下臨界電壓偏移差值越多。 由模擬數據看來,將基板改薄、濃度增加、照光在源極區域可以達到期望的特性。有結構於汲極電壓為12伏特、閘極電壓為8伏特、基板電壓為-8伏特,照光(照光強度為2.5瓦特每平方公分)操作下與未照光操作下臨界電壓偏移差約23.54%。

並列摘要


The first part of the thesis is to investigate by simulation the I-V curve of the thin film transistor with various defects during manufacturing processes. We change material parameters to simulate the devices in MEDICI and study the effects of various defects in the device structures. In the second part of the thesis, we study the integration of a nonvolatile memory into the pixel circuit so that the threshold voltage increases more at high illumination. As the threshold voltage increases, the brightness of the pixel decreases, leading to better uniformity in brightness. We found that VD=12volt、VG=8volt、VB=-8volt,the shift in threshold voltage between dark and illumination can be as high as 23.54%.

並列關鍵字

thin film transistor MURA

參考文獻


〔2-1-1〕Christos D. Dimitrakopoulous and Patrick R.L. Malenfant, “Organic Thin Film Transistors for large area electronics”, Adv. Mater. 2002,14,January 16
〔2-1-2〕H. Sirringhaus, N. Tessler, Richard H. Friend, “Integrated Optoelectronic Devices Based on conjugated polymers”, Science 280,1741 (1998)
〔2-2-1〕J. D. Bude, A. Frommer, M. R. Pinto, G. R. Weber, ” EEPROM/Flash Sub 3.0V Drain-Source Bias Hot Carrier Writing”, in IEDM Tech, Dig., 1995, pp. 989-989
〔2-2-2〕Souvik Mahapatra, S. Shukuri, and Jeff Bude, “CHISEL Flash EEPROM—Part I: Performance and scaling”, IEEE Trans. Electron Devices, vol. 49, pp. 1296-1301, 2002
〔2-2-3〕J. D. Bude, “Gate current by impact ionization feedback in sub-micron MOSFET technologies,” in Symp. VLSI Technology Dig. Tech. Papers, 1995, pp. 101–102.

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