光晶片網路之結構設計與分析

Architectural Design and Analysis for Optical Network on Chip

楊宗穎(Yang, Tsung Ying)

指導教授 ： 洪毓玨

國立清華大學/電機資訊學院/光電工程研究所/碩士(2011年)

https://doi.org/10.6843/NTHU.2011.00089

摘要

隨者電晶體微型化進入奈米尺寸的世代，電連結系統將面臨低擴充性、頻寬上的限制、電阻與電容產生之延遲效應…等問題。光晶片連結提供一個好的方案以解決上述之窘境，讓下個世代之多核心之晶片傳輸有更優越之效能表現。
本論文研究在短距離的傳輸系統下所做的光連結系統設計。首先我們設計出高擴充性、低傳輸損耗及低功率耗損之3x3及4x4非阻塞式光切換器，做結構上之分析及訊號傳輸品質評估，並與相關文獻做比較。基於此兩類結構，應用於不同拓樸如環狀及網狀網路，以達多核心晶片間傳輸。最後希望上述之設計方針與分析，能供未來系統設計者做一個參考依據。

關鍵字

光連結技術 ； 矽光子學 ； 光切換器 ； 光晶片網路 ； 多核心晶片

並列摘要

As the transistors enters the scales of the nanometer regime, metallic interconnect will be highly inefficient in several issues, such as poor scalability, limited bandwidth, RC delay, and so on. On-chip interconnect implemented in the optical domain has been considered as a promising candidate toward next generation chip multiprocessor (CMP) with advanced performance.
In this study, we mainly focused on designing the communication system in short distance regime. First, we designed 3x3 and 4x4 non-blocking optical switches with high scalability, low propagation loss, and low power consumption. We analyzed the structure, signal quality, and compared with recent literatures. On basis of two frameworks, we applied them to different topologies such as ring and mesh for optical network on chip (ONoC) to achieve chip multiprocessor. Finally, we hope that the design strategies for optical switches and corresponded ONoC will provide a guideline for system level designer for choosing optimized topology in ONoC depending on implementation infrastructure.

並列關鍵字

optical interconnect ； silicon photonics ； optical switch ； optical network on chip (ONoC) ； multiprocessor system-on-chip (MPSoC)

參考文獻

[2] G. Tosik, Z. Lisik, and F. Gaffiot, “Optical interconnections in future VLSI systems,” Telecommunications and information technology 6, 105-108 (2007)

[3] D. A. B. Miller, “Optical interconnects to electronic chips,” Applied Optics 49, F59-F70 (2010)

[5] G. Grasso, P. Galli, M. Romagnoli, E. Iannone, and A. Bogoni, “Role of Integrated Photonics Technologies in the Realization of Terabit Nodes,” Optical Communications and Networking 1, B111-B119 (2009)

[7] M. Paniccia, “Integrating silicon photonics,” Nature Photonics 4, 498-499 (2010)

[8] M. Hochberg and T. Baehr-Jones, “Towards fabless silicon photonics,” Nature Photonics 4, 492-494 (2010)