射頻元件低頻雜訊特性分析與模型

Flicker Noise Characterization and Modeling for RF MOSFETs

詹智元(Chih-Yuan Chan)

指導教授 ： 徐碩鴻

國立清華大學/電機資訊學院/電子工程研究所/博士(2008年)

摘要

為了進一步提升金氧半場效電晶體的效能，元件通道長度和氧化層厚度均必須不斷地縮小。然而當電晶體縮小的過程中，許多負面的效應也漸漸浮現，例如：低頻雜訊的增加以及應力效應等。尤其是低頻雜訊不論在RF通訊系統、生醫晶片或低耗電量的攜帶式聲音相關產品，都扮演著相當關鍵的角色。主要是低頻雜訊將直接影響到訊號的波形，使其失真造成系統誤判。
此篇論文當中，將針對淺溝槽隔離（Shallow Trench Isolation, STI）對低頻雜訊的影響作討論。首先文中設計一系列對稱（SA= SB）與不對稱（SA≠ SB）邊界延伸結構的元件，經由改變淺溝槽隔離到閘極的長度產生不同的應力效應。研究中發現在對稱元件中當SA(SB)從0.6um延伸到10um時，雜訊不論在大小或變異上將有大幅度的改善。進一步的深入研究不對稱（SA≠ SB）結構元件，更發現當偏壓在飽和區時，雜訊受源極端的應力影響較大。主要是因為偏壓在飽和區時，汲極端的電子多以飽和速度在傳輸，因此相對於汲極端應力所產生的缺陷較不敏感。
接著第二部分，針對RF指叉狀電晶體作相關研究，在固定元件總寬度改變閘極數目（finger number）觀察雜訊表現。實驗結果首度發現，閘極數目較少的元件（W/L= 10/0.13, Nfinger= 4）在雜訊變異上比閘極數目較多的元件（W/L= 1/0.13, Nfinger= 40）要來的穩定許多，而且G-R雜訊的表現也較後者來的少。其可能的原因為1-um （Nfinger= 40）的元件由於閘極數目較多，而閘極邊緣受到周圍STI應力的擠壓，導致在閘極的邊緣有許多寄生的缺陷。當閘極數目越多，這些缺陷數量越多，使的元件和元件之間的雜訊變異的幅度也就越大。相反的當閘極數目變少的同時，元件和元件之間的雜訊變異相對也就較為接近。為了進一步的研究元件中G-R雜訊的變化，實驗中在平板上加熱從25度到65度（10 度 / step），明顯可以看到G-R雜訊隨溫度上升而往高頻移動，並藉由Arrhenius圖可得知缺陷幾乎都是位於深層能帶（mid-band level），缺陷能量分佈從0.39 eV到0.535 eV均可發現。這樣的分佈也說明著缺陷的成因可能並不是單一機制所造成。而可能的因素主要和氧化層在STI邊緣的缺陷有關。
最後在雜訊模型上，針對BSIM4模型作詳細的探討。儘管BSIM4模型已經被使用數十年，卻少有文獻詳細敘述參數翠取流程。文中提出一套有效翠取方法，首先藉由偏壓在不同偏壓條件下量測雜訊，來翠取四個雜訊參數（EF，NoiseA，NoiseB和NoiseC）。理論上，翠取出四個雜訊參數便完成模型。然而實際的結果發現並非如此，為了進一步修正原先的模型，電流修正技術以及變異模型在文中第一次被提出，從不同偏壓模擬的結果將可以精準的描述低頻雜訊特性，並可應用於一般的BSIM4模型中。

關鍵字

金氧半場效電晶體 ； 低頻雜訊 ； 射頻元件

並列摘要

The geometry effect on the flicker noise characteristics in 0.13-um single-finger and multi-finger RF MOSFETs are studied in this dissertation. First, by symmetrically extending the distance between the shallow-trench-isolation (STI) to the gate, both single-finger NMOS and PMOS presented obvious improvement on the noise characterization. As the distance increased from 0.6 um to 10 um, the average noise level reduced by more than one order of magnitude and the standard deviations improved from 5.95 dB to 1.79 dB for NMOS. To further identify the noise mechanism, the devices with asymmetrical STI-to-gate distances were also investigated. It was found that the distance in the source side has a much higher impact on the observed noise characteristics. The results suggested that the noise characterization were dominated by the STI stress induced traps for both NMOS and PMOS.
In addition, this study also reports the impact of STI on flicker noise characteristics in multi-finger RF NMOS. The drain noise current spectral density was measured in both triode and saturation regions for a more complete study. The devices with a relatively small finger width and a large finger number (W= 1 um/Nfinger= 40 and W= 5 um/Nfinger= 8) presented more pronounced G-R noise characteristics compared to those with W= 10 um/Nfinger= 4. Moreover, a wide noise level variation of more than one order of magnitude was associated with the more obvious G-R noise components. The observed trends can be explained by the non-uniform stress effect of STI and also the associated traps at the edge of the gate finger between STI and the active region. The activation energy of the traps extracted from various temperatures is in a range from EC-0.397 eV to EC-0.54 eV.
Finally, the detailed procedure of parameter extraction for BSIM4 flicker noise model was also proposed. The original BSIM4 model was revised by adding the current calibration function and noise variation model. The revised model presented a good agreement with the measured results. This study provides a way for circuit designers to predict the noise level in a more precise manner.

並列關鍵字

CMOS ； Flicker noise ； RF device ； STI

參考文獻

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