可快速開機常關型應用之非揮發性三元內容循址記憶體

A Nonvolatile TCAM for Normally-off Instant-on Application

莊淨皓(Ching-Hao Chuang)

指導教授 ： 張孟凡

國立清華大學/電機資訊學院/電機工程學系/碩士(2015年)

摘要

近年可攜帶之智慧型電子產品之流行與普及為系統設計帶來新的問題。在有限的電池能量供應之下必須同時達到省電以及維持系統之高效率操作。傳統方法所使用之雙巨集（2-MACRO）架構雖可以低成本達到系統的工作需求，但面臨有限的電池供應，雙巨集架構在系統待機的時候必須花費大量能量與時間保存資料。而促使單巨集（1-MACRO）架構之出現。
利用新式非揮發性記憶體的低功耗，快速，可與邏輯製程相容之特性，本篇論文提出了一種新式的5T2R三元內容循址記憶體細胞設計。使用電阻式記憶體元件代替靜態隨機存取記憶體細胞（SRAM）作為儲存元件，大大減少三元內容循址記憶體細胞之面積，同時擁有待機狀態零漏電電流（leakage current）的特色，更加降低功耗。所提出之5T2R三元內容循址記憶體細胞利用細胞內小電流讀取電阻式記憶體之資料，以決定相符線（match-line）之放電與否。與國際上已發表之作品比較，搜尋速度以及可適應之電阻式記憶體元件之電阻值範圍都各有改善。
此篇論文展示了新式的5T2R三元內容循址記憶體細胞設計。在正常工作電壓時可達到1.6ns之access time。在大範圍的電阻值比之下皆能適應並正常進行搜尋操作，並不因此拖慢搜尋速度。而其L型細胞佈局圖可完成高密度之三元內容循址記憶體細胞陣列。

關鍵字

三元內容循址記憶體 ； 非揮發性

並列摘要

Recently, mobile and intelligent electronic devices have spread everywhere, but this has brought new issues to system design. We have to achieve low power and high system performance in a battery-limited condition. The conventional 2-MACRO architecture can reach the performance demand with a low cost; but for systems with limited battery-power, the 2-MACRO architecture may consume large power and time to store the data. The single-MACRO architecture has been developed to solve this issue.
Emerging non-volatile memory devices have low-power, high speed and are compatible with logic processes. Due to these merits, we have proposed a new 5T2R non-volatile ternary content addressable memory cell (5T2R nvTCAM cell) using this device. Replacing SRAM cell with a ReRAM device has greatly decreased the layout area of TCAM cell. Since there is zero leakage current in stand-by mode, the power consumption is further decreased. The proposed 5T2R nvTCAM cell reads the data stored in the ReRAM with a small current, and then decides whether the match-line needs to be discharged according to the compared result. Compared with previous works, the proposed 5T2R nvTCAM cell has improved the search speed and tolerable resistance ratio.
In summary, we have proposed a 5T2R nvTCAM cell design. Its access time is 1.6ns with a supply of 1V VDD. It can successfully perform search operation under a wide range of resistance ratios, and maintain a fair
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search speed under different conditions. The special L-shaped cell layout can accomplish a high density nvTCAM cell array

並列關鍵字

TCAM ； Nonvolatile

參考文獻

[1] K. Pagiamtzis and A. Sheikholeslami , " Content-addressable memory (CAM) circuits and architectures: a tutorial and survey ", IEEE J. Solid-State Circuits (JSSC) , pp. 712 - 727 , Mar. 2006

[2] H. Noda, K. Inoue, M. Kuroiwa, A. Amo, A. Hachisuka et al. , " A 143MHz 1.1W 4.5Mb dynamic TCAM with hierarchical searching and shift redundancy architecture ", in IEEE International Solid-State Circuits Conference (ISSCC) Dig. Tech. Papers, pp. 208 - 523 , 2004

[3] S. Matsunaga, A. Katsumata, M. Natsui, S. Fukami, T. Endoh et al. , " Fully Parallel 6T-2MTJ Nonvolatile TCAM with single-transistor-based self match-line discharge control ", in IEEE Symposium on VLSI Circuits (VLSIC) Dig. Tech. Papers, pp. 298 - 299 , 2011

[4] S. Matsunaga, S. Miura, H. Honjou, K. Kinoshita, S. Ikeda et al. , " A 3.14 um2 4T2MTJ-cell fully parallel TCAM based on nonvolatile logic-in-memory Architecture ", in IEEE Symposium on VLSI Circuits (VLSIC) Dig. Tech. Papers, pp. 44 - 45 , 2012

[5] J. Li, R. K. Montoye, M. Ishii, and L. Chang , " 1 Mb 0.41 µm² 2T-2R Cell Nonvolatile TCAM with two-bit encoding and clocked self-referenced sensing ", IEEE J. Solid-State Circuits (JSSC) , pp. 896 - 907 , Apr. 2014