一個支援H.264/AVC標準全高畫質影像編碼器之高平行架構幀內預測器

幀內預測是H.264/AVC影像編碼標準中幀內編碼方式的第一個程序，而幀內編碼方式是利用移除空間多餘的資訊達到影像壓縮的目的。為了支援高畫質影像編碼的應用，我們提出了一個高平行架構的幀內預測器以加快總預測時間。經過系統需求分析後，幀內預測器的效能必須達到每個時鐘脈衝週期產生32個luma 4x4預測畫素或者16個luma 16x16、chroma 8x8的預測畫素。此外，我們提出一個可半重新裝配的硬體架構、一個處理單元的最佳化方法以及一個預測模式層級的排程方案，去達到降低硬體需求。我們使用verilog 硬體描述語言實作所提出的硬體架構。在200MHz 的運作時脈下，所需之邏輯閘數為20.4K。與直接實作的結果做比較，所提出的硬體架構可以減少90.2%的硬體面積。此外，所提出預測器在產生預測畫素需要4時鐘脈衝週期以完成一個luma 4x4模式的預測，花費3.5K個邏輯閘；而需要96個時鐘脈衝週期以完成luma 16x16、chroma 8x8模式的預測，花費11.7K個邏輯閘。最後，所提出的幀內預測器已經成功的整合進入H.264/AVC幀內編碼器，其效能可以在運作在138MHz達到即時編碼1080p全高畫質之影像。

關鍵字

幀內預測； H.264/AVC ；編碼器；影像編碼；幅內預測

並列摘要

Intra Prediction is the first process of H.264/AVC intra encoding, which compresses video by removing spatial redundancy. For high-resolution applications, we propose a highly parallel architecture of Intra Prediction Generation Engine (IPGE) to shorten the prediction time. An analysis derives that the required degree of Pixel-Level Parallelism (PLP) for luma 4x4 is 32 pixel/cycle, whereas for luma 16x16 and chroma 8x8 is 16 pixel/cycle. In addition, we propose a semi-reconfigurable architecture, a Processing Element Optimization Method (PEOM), and a Mode-Level Scheduling Scheme (MLSS) to reduce hardware usage. The proposed design has been implemented in Verilog RTL and synthesized targeted towards a TSMC 0.13μm CMOS cell library. Its gate count is 20.4K when running at 200MHz. In comparison with direct implementation, the proposed architecture reduces 90.2% of gate count. The engine for all luma 4x4 modes consumes 3.5K gates and takes 4 cycles to predict a 4x4 block; the engine for luma 16x16/chroma 8x8 modes consumes 11.7K gates and takes totally 96 cycles to generate a 16x16 macroblock. We have integrated the proposed design into an H.264/AVC intra encoder which can process 30fps 1080p HD video when running at 138MHz.

並列關鍵字

intra prediction ； H.264/AVC ； encoder ； video coding ； HASH(0x1d00db70)

參考文獻

[3] Video Coding for Low Bit Rate Communication, 1998.

[5] A. John, F. Kossentini, H. Schwarz, T. Wiegand and G. J. Sullivan, “Performance Comparison of Video Coding Standards using Lagrangian Coder Control,” Proceedings of International Conference on Image Processing, vol. 2, pp. 501-504, September 2002.

[6] A. Al, B. P. Rao, S. S. Kudva, S. Babu, D. Suman and A. V. Rao, “Quality and Complexity Comparison of H.264 Intra Mode with JPEG2000 and JPEG,” International Conference on Image Processing, vol. 1, pp. 525-528, October 2004.

[7] T. C. Chen, H. C. Fang, C. J. Lian, C. H. Tsai, Y. W. Huang, T. W. Chen, C. Y. Chen, Y. H. Chen, C. Y. Tsai and L. G. Chen, “Algorithm Analysis and Architecture Design for HDTV Applications - a look at the H.264/AVC video compressor system.” IEEE Circuits and Devices Magazine, vol. 22(3), pp. 22 - 31, May-June 2006.

[9] D. Marpe, T. Wiegand and G. J. Sullivan, “The H.264/MPEG4 Advanced Video Coding Standard and its Applications,” IEEE Communications Magazine, vol. 44(8), pp.134-143, August 2006

國際替代計量

一個支援H.264/AVC標準全高畫質影像編碼器之高平行架構幀內預測器

全文下載

主題瀏覽