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  • 學位論文

應用於細胞膜外量測之CMOS微加工神經電晶體感測系統

CMOS-micromachined, Neuro-Transistor Microsystem for Extracellular Neural Recording

指導教授 : 陳新
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摘要


近年來,神經工程的研究,如腦機介面及腦傷輔具等逐漸受到重視,此方面知識技術的拓展有助於藥學、醫學上的進步,另一方面亦可增進人們對於腦的瞭解。甚至可幫助中風或腦傷的病人恢復部分的自主能力,而腦與機電儀器的介面,主要的功能為紀錄神經細胞活動時所產生的電訊號,或用電訊號刺激神經細胞。測量神經的電訊號的方法,又分為細胞膜內與膜外記錄兩種,相較於膜內紀錄,膜外記錄優點在於非侵入式記錄適合長時間以及同時記錄大批樣本測量,但缺點就是記錄到訊號較小,較容易受雜訊干擾。 本論文試圖設計一種低雜訊且與標準CMOS製成相容的神經-矽介面並應用於細胞膜外訊號記錄。而記錄電路與感測器的整合更降低感測器陣列系統在於佈局上的複雜。感測介面是採用金屬氧化物半導體為基礎(MOSFET),並透過晶粒等級後製程加工為氧半電晶體(OSFET)。在實際的測量中發現氧半電晶體存在著一些不理想特性,包含著製程變異造成電性誤差、臨限電壓(Vth)的飄移以及後製程後電晶體雜訊的增加。因此在電路設計中,最後採用臨限電壓自動補償迴路克服製程變異以及臨限電壓飄移所造成陣列系統量測之不便。雜訊的增加,則發現為水溶液中離子被閘極氧化層表面缺陷捕抓所形成。 論文中將詳細介紹後段製程加工、神經-矽介面特性分析、閘極(gate)與基底(bulk)偏壓對氧半電晶體雜訊的影響、電路設計考量,以及實際生物訊號測量結果。

並列摘要


Recently, research on the neuroscience is becoming a potential subject and holds a lots attraction, such as Brain Machine Interface (BMI) or the Brain-Computer Interface (BCI). The development of neuroscience not only promotes the progress of the medicine and pharmacology but also the understanding of brain function. Furthermore, the neural prosthesis is useful for patients with neural diseases to restore part of their physiological functions. The bidirectional communication is based on recording neural activity and stimulating neurons. Intracellular recording and extracellular recording are both approaches to monitored neural activity. Compared with Intracellular recording, extracellular recording has the ability to record large amount of samples and the synchronized activities. This thesis proposes a low-noise, CMOS-compatible, neuro-silicon interface for extracellular recording. For the multi-channel array system, CMOS-compatible sensor can be integrated with the recording circuit to decrease the routing complexity. The interface is based on the OSFET, which is a MOSFET with several micromachined process steps. In the experimental results, we find that OSFETs have some unideal characteristics, process variation、threshold-voltage drift and increased noise after post process. Finally, the automatic Vth-compensation feedback loop is used to overcome the biasing complex for array system. The post-CMOS process, characteristics of neuro-silicon interface, the circuit design, the influence of gate to bulk voltage for OSFET noise,and the results of biological tests are introduced in the thesis.

參考文獻


[1] B. He, Neural Engineering, 1st ed. Kluwer Academic, 2005.
[3] S. References, A. Hodgkin, and A. Huxley, “A quantitative description of membrane current and its application to conduction and excitation in nerve,” J Physiol, vol.117, no. 4, pp. 500–544, 1952.
[6] F. Patolsky and et. al., “Detectioin, stimulation, and inhibition of neuronal signals with high density nanowire transistor arrays,” Science, vol. 313, pp. 1100 – 1104, 2006.
[7] P. Fromherz and et al., “Membrane transistor with giant lipid vesicle touching a silicon chip,” APPLIED PHYSICS A-MATERIALS SCIENCE and PROCESSING, vol. 69, no. 5, pp. 571 – 576, 1999.
[8] K. Wise and et. al., “Wireless implantable microsystems: High-density electronic interfaces to the nervous system,” Proceedings of the IEEE, vol. 92, no. 1, pp. 76–97, 2004.

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