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  • 學位論文

應用於毫米波之氮化鋁基板 被動電路整合設計與製作

Design and Fabrication of Integrated Passive Devices on AlN Substrate for Millimeter-Wave Applications

指導教授 : 徐碩鴻

摘要


近年來,IC製程儘管持續依照摩爾定律(Moore’s Law)前進,可是卻呈現有放慢的趨勢,除了電晶體本身縮小所造成的製程困難外,大量的積體電路運作時所產生的廢熱也使得3C產品良率下降。因此,需要一種新的技術來突破這種困境。現在IC製程在基板選擇上通常是採用Si基板,因為考量到價格較低廉以及與CMOS的結合,Si基板儼然成為普遍製造商使用的材料,但考慮到大量積體電路運作時所產生的廢熱處理,氮化鋁基板(AlN substrates)有著比Si基板更好的導熱係數,價格也不會太過昂貴,讓氮化鋁基板成為投入研究的議題。本論文著重在氮化鋁基板之整合型被動電路之元件設計以及進一步的電性量測分析,並藉由電性量測分析所得到的結果提出在氮化鋁基板上的整合型被動電路元件之高頻應用。首先我們利用傳輸線結構來分析整體製程架構的電性特性,並從中觀察鈍化層(Passivation layers)對其特性的影響,進而得到製程架構之最佳化設計。 本論文將藉由分析傳輸線結構所得到的電性特性下,來設計不同的整合型被動電路,因此將呈現不同的氮化鋁基板整合型被動電路的電性特性之量測結果。本論文設計了三種整合型被動元件,第一種是Wilkinson功率分配器,其量測結果為|S_21|參數在24GHz時為-5.8dB,|S_11|參數在24GHz時為-9.6dB;第二種是半波天線與四分之一波天線,其量測結果為半波天線的|S_11|參數最低值出現在23.3GHz左右,其值為-13.067dB,四分之一波長天線的|S_11|參數最低值出現在23.2GHz左右,其值為-14.465dB;第三種是整合型Transformer,利用flip-chip方式結合CMOS功率放大器,樣本1的|S_22|參數在24GHz時為-2.39dB,|S_11|參數在20.6GHz時為-14.5dB,樣本2的|S_22|參數在20.9GHz時為-15.5dB,|S_11|參數在24GHz時為-0.28dB。然而,因為flip-chip功率放大器在flip-chip連結封裝時出現接觸不良的問題,所以flip-chip功率放大器量測結果沒有表現出放大功率的特性結果。並藉由HFSS跟Sonnet電磁模擬軟體來模擬氮化鋁基板及製程架構對元件高頻特性的影響。在未來也可藉由此一分析方法作為依據來設計相關氮化鋁基板之整合型被動電路架構,以改善廢熱對於3C產品所造成的影響。

並列摘要


In recent years, integrated circuits technology has been improved according to Moore’s Law, but the speed of this trend becomes slower. In addition to the process issue of transistors miniaturization, the yield of the 3C products decreases because of the heating problem generated during circuit operation. Therefore, a new technology is needed to overcome the difficulties. The silicon substrate is the most commonly used material for modern integrated circuits technology because the cost and high integration level. However, the heating problem in silicon IC is still a concern. In this thesis, we focus on the AlN substrate which has better thermal conductivity and the cost is even lower than the Si substrate. This thesis focuses on design and analysis of the Integrated Passive Device (IPD) in AlN substrate. The device performance is expected to be improved for microwave applications. First, we use transmission line structure to analyze and optimize the process. Second, we design three IPDs in AlN substrate. The first device is Wilkinson power divider. The measurement result is with an insertion loss of -5.8dB and an input return loss of -9.6dB at 24GHz. The second type of devices are half-wave antenna and quarter-wave antenna. The measurement result shows an input return loss of -13.067dB at 23.3GHz for half-wave antenna and a input return loss of -14.465dB at 23.2GHz for the quarter-wave antenna. The third device is a IPD transformer to be integrated with CMOS PA by flip-chip. The measurement result of sample 1 shows an input return loss of -14.5dB at 20.6GHz and a output return loss of -2.39dB at 24GHz. The measurement result of sample 2 is with an input return loss of -0.28dB at 24GHz and a output return loss of -15.5dB at 20.9GHz. However, the PA did not show the expected amplification characteristics due to the contact problem in flip-chip process. By using HFSS and Sonnet, we analyze the impact of process and geometry on electrical characteristics of IPD in the AlN substrate for microwave applications. In the future, we can design more IPDs in AlN substrate according to this analysis result and improve heating problem for different applications.

參考文獻


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